ATTINY261-20MUR Atmel, ATTINY261-20MUR Datasheet - Page 89

IC MCU AVR 2K FLASH 20MHZ 32QFN

ATTINY261-20MUR

Manufacturer Part Number
ATTINY261-20MUR
Description
IC MCU AVR 2K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY261-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12. Timer/Counter1
12.1
12.2
2588E–AVR–08/10
Features
Overview
Timer/Counter1 is a general purpose high speed Timer/Counter module, with three independent
Output Compare Units, and with PWM support.
The Timer/Counter1 features a high resolution and a high accuracy usage with the lower pres-
caling opportunities. It can also support three accurate and high speed Pulse Width Modulators
using clock speeds up to 64 MHz. In PWM mode Timer/Counter1 and the output compare regis-
ters serve as triple stand-alone PWMs with non-overlapping non-inverted and inverted outputs.
Similarly, the high prescaling opportunities make this unit useful for lower speed functions or
exact timing functions with infrequent actions. A simplified block diagram of the Timer/Counter1
is shown in
Figure 12-1. Timer/Counter1 Block Diagram
8/10-Bit Accuracy
Three Independent Output Compare Units
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase and Frequency Correct Pulse Width Modulator (PWM)
Variable PWM Period
High Speed Asynchronous and Synchronous Clocking with Dedicated Prescaler
Independent Dead Time Generators for Each PWM Channel
Fault Protection Unit Can Disable PWM Output Pins
Five Independent Interrupt Sources (TOV1, OCF1A, OCD1B, OCF1D, FPF1)
TOV1
REGISTER (TIMSK)
T/C INT. MASK
TIMER/COUNTER1
8-BIT OUTPUT COMPARE
COMPARE REGISTER A
10-BIT COMPARATOR
REGISTER A (OCR1A)
(TCNT1)
OCF1A
10-BIT OUTPUT
Figure
OCF1B
REGISTER (TIFR)
12-1.
T/C INT. FLAG
CLK
COUNT
CLEAR
DIRECTION
OCF1D
10-BIT COMPARATOR
COMPARE REGISTER B
8-BIT OUTPUT COMPARE
REGISTER B (OCR1B)
10-BIT OUTPUT
DEAD TIME GENERATOR
OC1A
REGISTER A (TCCR1A)
T/C CONTROL
8-BIT DATABUS
OC1A
8-BIT OUTPUT COMPARE
COMPARE REGISTER C
10-BIT COMPARATOR
REGISTER C (OCR1C)
10-BIT OUTPUT
DEAD TIME GENERATOR
OC1B
REGISTER B (TCCR1B)
TIMER/COUNTER1 CONTROL LOGIC
T/C CONTROL
OC1B
8-BIT OUTPUT COMPARE
COMPARE REGISTER D
REGISTER D (OCR1D)
10-BIT COMPARATOR
10-BIT OUTPUT
REGISTER C (TCCR1C)
DEAD TIME GENERATOR
OC1D
T/C CONTROL
OC1D
2-BIT HIGH BYTE
REGISTER (TC1H)
REGISTER D (TCCR1E)
REGISTER C (TCCR1D)
FAULT_PROTECTION
T/C CONTROL
T/C CONTROL
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