PI7C21P100BNHE Pericom Semiconductor, PI7C21P100BNHE Datasheet - Page 43

• Manufacturer Part Number: PI7C21P100BNHE
• Description: Peripheral Drivers & Components (PCIs) PCI-X to PCI-XBridge 2 Port
• Manufacturer: Pericom Semiconductor

Specifications of PI7C21P100BNHE

• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: CSBGA-304
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.1.1
8.1.2
8.1.3
8.1.4
SIGNAL TYPE DEFINITION
VENDOR ID REGISTER – OFFSET 00h
DEVICE ID REGISTER – OFFSET 00h
COMMAND REGISTER – OFFSET 04h
SIGNAL TYPE
RO
RW
RWC
BIT
15:0
BIT
31:16
BIT
15:10
9
8
7
6
5
4
3
FUNCTION
Vendor ID
FUNCTION
Device ID
FUNCTION
Reserved
Fast Back-to-Back
Enable
P_SERR# Enable
Wait Cycle Control
Parity Error Response
VGA Palette Snoop
Enable
Memory Write and
Invalidate Enable
Special Cycle Enable
DEFINITION
READ ONLY
READ / WRITE
READ / WRITE 1 TO CLEAR
TYPE
RO
TYPE
RO
TYPE
RO
RO
RW
RO
RW
RW
RO
RO
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Identifies Pericom as the vendor of this device. Hardwired as 12D8h
DESCRIPTION
DESCRIPTION
Identifies the device as PI7C21P100B. Hardwired as 01A7h.
DESCRIPTION
Reserved. Returns 000000 when read.
Fast Back-to-Back Control
0: Prohibits PI7C21P100B to initiate fast back-to-back transactions
on the primary
This bit is ignored in PCI-X mode. Reset to 0
System Error Control
0: Disables the P_SERR# driver on the primary
1: Enables the P_SERR# driver on the primary
Reset to 0
Wait Cycle Control
0: Address/data stepping is disabled (primary and secondary)
This bit is ignored in PCI-X mode. Returns 0 when read.
Parity Error Response
0: PI7C21P100B may ignore any detected parity errors and continue
normal operation
1: PI7C21P100B must take its normal action when a parity error is
detected.
Reset to 0
VGA Palette Snoop Control
0: Ignore VGA palette accesses on the primary
1: Enables positive decoding response to VGA palette writes on the
primary with I/O address bits AD[9:0] equal to 3C6h, 3C8h, and
3C9h (inclusive of ISA aliases; AD[15:10] are not decoded and may
be any value.
Reset to 0
Memory Write and Invalidate Control
0: Disables Memory Write and Invalidate transactions.
PI7C21P100B does not generate memory write and invalidate
transactions.
This bit is ignored in PCI-X mode. Returns 0 when read.
Special Cycle Control
0: PI7C21P100B does not respond as a target to Special Cycle
transactions.
Returns 0 when read.
2-PORT PCI-X TO PCI-X BRIDGE
November 2005 – Revision 1.02
PI7C21P100B