PI7C21P100BNHE Pericom Semiconductor, PI7C21P100BNHE Datasheet - Page 58

Peripheral Drivers & Components (PCIs) PCI-X to PCI-XBridge 2 Port

PI7C21P100BNHE

Manufacturer Part Number
PI7C21P100BNHE
Description
Peripheral Drivers & Components (PCIs) PCI-X to PCI-XBridge 2 Port
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C21P100BNHE

Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Package / Case
CSBGA-304
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
PI7C21P100BNHE
Manufacturer:
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Quantity:
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Part Number:
PI7C21P100BNHE
Manufacturer:
PI
Quantity:
1 831
8.1.45
8.1.46
The below settings are the only allowed values. Other settings are not valid and will result in
smaller retry counts. When the counter expires, the bridge discards the requested transaction
on the secondary bus and issues SERR# on the primary bus if enabled.
0000 0000: No expiration limit
8000 0000: Allow 2G retries before expiration
0100 0000: Allow 16M retries before expiration
0001 0000: Allow 64K retries before expiration
0000 0100: Allow 256 retries before expiration
DISCARD TIMER CONTROL REGISTER – OFFSET 68h
RETRY AND TIMER STATUS REGISTER – OFFSET 6Ch
BIT
7:4
3
2
1
0
BIT
7:4
3
2
1
0
FUNCTION
RESERVED
Primary Discard Timer
Short Duration
Secondary Discard
Timer Short Duration
Primary Discard Timer
Disable
Secondary Discard
Timer Disable
FUNCTION
RESERVED
Primary Discard Timer
Status
Secondary Discard
Timer Status
Primary Retry Counter
Status
Secondary Retry
Counter Status
TYPE
TYPE
RO
RW
RW
RW
RW
RO
RW
RW
RW
RW
Page 58 of 79
DESCRIPTION
Reserved. Returns 0000 when read.
Primary Discard Timer Short Duration
0: Use bit[24] offset 3Ch of the bridge control register to indicate
how many PCI clocks should be allowed before the primary discard
timer expires.
1: 64 PCI clocks allowed before the discard time expires.
Reset to 0
Secondary Discard Timer Short Duration
0: Use bit[25] offset 3Ch of the bridge control register to indicate
how many PCI clocks should be allowed before the secondary
discard timer expires.
1: 64 PCI clocks allowed before the secondary discard timer expires.
Reset to 0
Primary Discard Timer Disable
0: Enable the primary discard timer in conjunction with bit[27] offset
3Ch of the bridge control register
1: Disable the primary discard timer in conjunction with bit[27]
offset 3Ch of the bridge control register
Reset to 0
Secondary Discard Timer Disable
0: Enable the secondary discard timer in conjunction with bit[27]
offset 3Ch of the bridge control register
1: Disable the secondary discard timer in conjunction with bit[27]
offset 3Ch of the bridge control register
Reset to 0
DESCRIPTION
Reserved. Returns 0000 when read.
Primary Discard Timer Status
0: The primary discard timer has not expired since the last reset.
1: The primary discard timer has expired since the last reset.
Reset to 0
Secondary Discard Timer Status
0: The secondary discard timer has not expired since the last reset.
1: The secondary discard timer has expired since the last reset.
Reset to 0
Primary Retry Counter Status
0: The primary retry counter has not expired since the last request.
1: The primary retry counter has expired since the last request.
Reset to 0.
Secondary Retry Counter Status
0: The secondary retry counter has not expired since the last request.
1: The secondary retry counter has expired since the last request.
Reset to 0.
2-PORT PCI-X TO PCI-X BRIDGE
November 2005 – Revision 1.02
PI7C21P100B

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