LFXP2-8E-5FTN256I Lattice, LFXP2-8E-5FTN256I Datasheet - Page 122

FPGA - Field Programmable Gate Array 8K LUTs 201 I/O Inst on DSP 1.2V -5 Spd

LFXP2-8E-5FTN256I

Manufacturer Part Number
LFXP2-8E-5FTN256I
Description
FPGA - Field Programmable Gate Array 8K LUTs 201 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-8E-5FTN256I

Number Of Macrocells
8000
Number Of Programmable I/os
201
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
226304
Number Of I /o
201
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Package
256FTBGA
Family Name
LatticeXP2
Device Logic Units
8000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
201
Ram Bits
226304
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-8E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
USE DIN CELL
This preference specifies the given register to be used as an input flip-flop.
Syntax
where:
Example
USE DOUT CELL
Specifies the given register to be used as an output flip-flop.
Syntax
where:
Example
GROUP VREF
This preference is used to group all the components that need to be associated to one V
Syntax
Example
USE DIN CELL <cell_name>;
<cell_name> := string
USE DIN CELL “din0”;
USE DOUT CELL <cell_name>;
<cell_name> := string
USE DOUT CELL “dout1”;
LOCATE VREF <vref_name> SITE <site_name>;
IOBUF GROUP <group_name> BANK=<bank_name> VREF=<Vref_name>
LOCATE VREF “ref1” SITE PR29C;
LOCATE VREF “ref2” SITE PR48B;
IOBUF GROUP "group1" IO_TYPE=SSTL18_II BANK=0 VREF=vref1 ;
8-18
LatticeXP2 sysIO Usage Guide
REF
pin within a bank.

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