UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 192
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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(4) Prescaler mode register 0n (PRM0n)
192
PRM0n is the register that sets the TM0n count clock and TI00n and TI01n pin input valid edges.
Rewriting PRM0n is prohibited during operation (when TMC0n3 and TMC0n2 = other than 00).
PRM0n can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears PRM0n to 00H.
Cautions 1. Do not apply the following setting when setting the PRM0n1 and PRM0n0 bits to 11 (to
Remark n = 0:
n = 0, 1:
2. If the operation of the 16-bit timer/event counter 0n is enabled when the TI00n or TI01n pin
3. The valid edge of TI010 and timer output (TO00) cannot be used for the P01 pin at the same
specify the valid edge of the TI00n pin as a count clock).
• Clear & start mode entered by the TI00n pin valid edge
• Setting the TI00n pin as a capture trigger
is at high level and when the valid edge of the TI00n or TI01n pin is specified to be the rising
edge or both edges, the high level of the TI00n or TI01n pin is detected as a rising edge.
Note this when the TI00n or TI01n pin is pulled up. However, the rising edge is not detected
when the timer operation has been once stopped and then is enabled again.
time, and the valid edge of TI011 and timer output (TO01) cannot be used for the P06 pin at
the same time. Select either of the functions.
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
User’s Manual U17260EJ6V0UD
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