UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 88
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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3.4.7 Based addressing
88
[Function]
[Operand format]
[Description example]
[Illustration]
8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in
the register bank specified by the register bank select flag (RBS0 and RBS1), and the sum is used to address
the memory. Addition is performed by expanding the offset data as a positive number to 16 bits. A carry from
the 16th bit is ignored.
This addressing can be carried out for all of the memory spaces. However, before addressing a memory bank
that is not set by the memory bank select register (BANK), change the setting of the memory bank by using
BANK.
MOV A, [HL + 10H]; when setting byte to 10H
The contents of the memory
addressed are transferred.
HL
A
Identifier
16
7
[HL + byte]
Operation code
H
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17260EJ6V0UD
8
0
1
0
7
7
Description
0
0
1
0
0
1
Memory
1
0
L
1
0
1
0
0
0
0
0
10
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