UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 282
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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<5> By performing procedures <3> and <4> repeatedly, a pulse with an arbitrary duty can be obtained.
<6> To stop the count operation, set TMHEn = 0.
Cautions 1. The set value of the CMP1n register can be changed while the timer counter is operating.
Remarks 1. For the setting of the output pin, see 9.3 (3) Port mode register 1 (PM1).
If the setting value of the CMP0n register is N, the setting value of the CMP1n register is M, and the count
clock frequency is f
• PWM pulse output cycle = (N + 1)/f
• Duty = (M + 1)/(N + 1)
2. For details on how to enable the INTTMHn signal interrupt, see CHAPTER 19
3. n = 0, 1
2. Be sure to set the CMP1n register when starting the timer count operation (TMHEn = 1) after
3. Make sure that the CMP1n register setting value (M) and CMP0n register setting value (N) are
FUNCTIONS.
However, this takes a duration of three operating clocks (signal selected by the CKSn2 to
CKSn0 bits of the TMHMDn register) from when the value of the CMP1n register is changed
until the value is transferred to the register.
the timer count operation was stopped (TMHEn = 0) (be sure to set again even if setting the
same value to the CMP1n register).
within the following range.
00H ≤ CMP1n (M) < CMP0n (N) ≤ FFH
CNT
, the PWM pulse output cycle and duty are as follows.
CHAPTER 9 8-BIT TIMERS H0 AND H1
User’s Manual U17260EJ6V0UD
CNT
INTERRUPT
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