UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 302
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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11.3 Register Controlling Watchdog Timer
302
The watchdog timer is controlled by the watchdog timer enable register (WDTE).
(1) Watchdog timer enable register (WDTE)
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH or 1AH
Note The WDTE reset value differs depending on the WDTON setting value of the option byte (0080H). To
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated. If the
Address: FF99H
Symbol
WDTE
operate watchdog timer, set WDTON to 1.
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset signal
3. The value read from WDTE is 9AH/1AH (this differs from the written value (ACH)).
0 (watchdog timer count operation disabled)
1 (watchdog timer count operation enabled)
source clock to the watchdog timer is stopped, however, an internal reset signal is
generated when the source clock to the watchdog timer resumes operation.
is generated. If the source clock to the watchdog timer is stopped, however, an internal
reset signal is generated when the source clock to the watchdog timer resumes operation.
7
Figure 11-2. Format of Watchdog Timer Enable Register (WDTE)
After reset: 9AH/1AH
WDTON Setting Value
6
CHAPTER 11 WATCHDOG TIMER
Note
5
User’s Manual U17260EJ6V0UD
R/W
4
Note
.
1AH
9AH
3
WDTE Reset Value
2
1
0
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