UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 104

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

104
CR010 capture value
CR000 capture value
Note The carry flag is set to 1. Ignore this setting.
(3) Pulse width measurement with free-running counter and two capture registers
TM00 count value
TI000 pin input
TI010 pin input
When 16-bit timer counter 00 (TM00) is operated in free-running mode, it is possible to measure the pulse
width of the signal input to the TI000 pin.
Specify both the rising and falling edges as the valid edges of the TI000 pin, by using bits 4 and 5 (ES000 and
ES010) of PRM00.
When the valid edge specified by bits 4 and 5 (ES000 and ES010) of PRM00 is input to the TI010 pin, the
value of TM00 is taken into 16-bit timer capture/compare register 000 (CR010) and an interrupt request signal
(INTTM010) is set.
Also, when the inverse edge to that of the capture operation is input into CR010, the value of TM00 is taken
into 16-bit timer capture/compare register 000 (CR000).
Sampling is performed using the count clock cycle selected by prescaler mode register 00 (PRM00), and a
capture operation is only performed when a valid level of the TI000 pin is detected twice, thus eliminating
noise with a short pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Count clock
INTTM010
INTTM000
Figure 6-22. Timing of Pulse Width Measurement Operation with Free-Running Counter
0000H
t
(with Both Edges Specified)
0001H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
D0
(D1 − D0) × t
D0
User’s Manual U16898EJ5V0UD
D0 + 1
D1
D1
D1
D1 + 1
((D2 + 1) − D1) × t
(D2 − D1) × t
FFFFH
0000H
Note
Note
D2
D2
D2 + 1 D2 + 2
(D3 − D2) × t
D2 + 1
D3