UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 227
UPD78F9222MC(T)-5A4-A
Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet
1.UPD78F9222MCT-5A4-A.pdf
(414 pages)
Specifications of UPD78F9222MC(T)-5A4-A
Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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starts after the next instruction is executed.
set at the second clock of NOP (2-clock instruction). In this case, the MOV A, r instruction after the NOP instruction is
executed, and then the interrupt acknowledgment processing is performed.
12.4.2 Multiple interrupt servicing
being serviced, the interrupt mask function must be used to mask interrupts for which a low priority is to be set.
Figure 12-9. Interrupt Request Acknowledgment Timing (When Interrupt Request Flag Is Set at Last
If an interrupt request flag (××IF) is set at the last clock of the instruction, the interrupt acknowledgment processing
Figure 12-9 shows an example of the interrupt request acknowledgment timing for an interrupt request flag that is
Caution Interrupt requests will be held pending while the interrupt request flag registers (IF0, IF1) or
In order to perform multiple interrupt servicing in which another interrupt is acknowledged while an interrupt is
Interrupt
Clock
CPU
interrupt mask flag registers (MK0, MK1) are being accessed.
Clock During Instruction Execution)
NOP
CHAPTER 12 INTERRUPT FUNCTIONS
User’s Manual U16898EJ5V0UD
MOV A, r
Saving PSW and PC, jump
to interrupt servicing
8 clocks
servicing
Interrupt
program
227
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