UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 388

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

388
16-bit timer/
event
counter
00
Function
Interval timer
External event
counter
Pulse width
measurement
Square-wave
output
PPG output
One-shot pulse
output: software
trigger
One-shot pulse
output: external
trigger
Timer start
errors
One-shot pulse
output
Details of
Function
Changing the CR000 setting during TM00 operation may cause a malfunction.
To change the setting, refer to 6.5 Cautions Related to 16-bit Timer/Event
Counter 00 (17) Changing compare register during timer operation.
When reading the external event counter count value, TM00 should be read.
To use two capture registers, set the TI000 and TI010 pins.
The measurable pulse width in this operation example is up to 1 cycle of the
timer counter.
Changing the CR000 setting during TM00 operation may cause a malfunction.
To change the setting, refer to 6.5 Cautions Related to 16-bit Timer/Event
Counter 00 (17) Changing compare register during timer operation.
Changing the CRC0n0 setting during TM00 operation may cause a malfunction.
To change the setting, refer to 6.5 Cautions Related to 16-bit Timer/Event
Counter 00 (17) Changing compare register during timer operation.
Values in the following range should be set in CR000 and CR010.
0000H < CR010 < CR000 ≤ FFFFH
The cycle of the pulse generated through PPG output (CR000 setting value + 1)
has a duty of (CR010 setting value + 1)/(CR000 setting value + 1).
Do not set the OSPT00 bit to 1 again while the one-shot pulse is being output.
To output the one-shot pulse again, wait until the current one-shot pulse output
is completed.
When using the one-shot pulse output of 16-bit timer/event counter 00 with a
software trigger, do not change the level of the TI000 pin or its alternate-function
port pin. Because the external trigger is valid even in this case, the timer is
cleared and started even at the level of the TI000 pin or its alternate-function
port pin, resulting in the output of a pulse at an undesired timing.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC003 and TMC002 bits.
Do not input the external trigger again while the one-shot pulse is output. To
output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC002 and TMC003 bits.
An error of up to one clock may occur in the time required for a match signal to
be generated after timer start. This is because 16-bit timer counter 00 (TM00) is
started asynchronously to the count clock.
One-shot pulse output normally operates only in the free-running mode or in the
clear & start mode at the valid edge of the TI000 pin. Because an overflow does
not occur in the clear & start mode on a match between TM00 and CR000, one-
shot pulse output is not possible.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16898EJ5V0UD
Cautions
103, 104,
106
p. 95
pp. 99,
123
pp. 100,
121
pp. 101,
p. 108
p. 110
pp. 111,
123
pp. 111,
123
pp. 113,
119
pp. 113,
119
pp. 114,
119
pp. 115,
118
pp. 115,
120
pp. 116,
120
pp. 117,
118
p. 118
p. 119
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