UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 384

8BIT MCU, 4K FLASH, 256B RAM, 78F9222

UPD78F9222MC(T)-5A4-A

Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet

Specifications of UPD78F9222MC(T)-5A4-A

Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9222MC(T)-5A4-A
Manufacturer:
NEC
Quantity:
1 000
Part Number:
UPD78F9222MC(T)-5A4-A
Manufacturer:
NEC/PBF
Quantity:
6 640
Part Number:
UPD78F9222MC(T)-5A4-A
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
UPD78F9222MC(T)-5A4-A
Quantity:
458
384
This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Pin
functions
Memory
space
Port
functions
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
P121/X1,
P122/X2
Vector table
address
SP: stack
pointer
SP: Stack
pointer
P121/X1,
P122/X2
P34
P31, P31, P43
PMC2: Port
mode control
register 2
Details of
Function
The P121/X1 and P122/X2 pins are pulled down during reset.
No interrupt sources correspond to the vector table address 0014H.
Since reset signal generation makes the SP contents undefined, be sure to
initialize the SP before using the stack memory.
Stack pointers can be set only to the high-speed RAM area, and only the lower
10 bits can be actually set.
Thus, if the stack pointer is specified to 0FF00H, it is converted to 0FB00H in
the high-speed RAM area, since 0FF00H is in the SFR area and not in the high-
speed RAM area.
When the value is actually pushed onto the stack, 1 is subtracted from 0FB00H
to become 0FAFFH, but since that value is not in the high-speed RAM area, it is
converted to 0FEFFH, which is the same value as when 0FF00H is set to the
stack pointer.
The P121/X1 and P122/X2 pins are pulled down during reset.
Because the P34 pin functions alternately as the RESET pin, if it is used as an
input port pin, the function to input an external reset signal to the RESET pin
cannot be used. The function of the port is selected by the option byte. For
details, refer to CHAPTER 17 OPTION BYTE.
Also, since the option byte is referenced after the reset release, if low level is
input to the RESET pin before the referencing, then the reset state is not
released. When it is used as an input port pin, connect the pull-up resistor.
Because P30, P31, and P43 are also used as external interrupt pins, the
corresponding interrupt request flag is set if each of these pins is set to the
output mode and its output level is changed. To use the port pin in the output
mode, therefore, set the corresponding interrupt mask flag to 1 in advance.
When PMC20 to PMC23 are set to 1, the P20/ANI0 to P23/ANI3 pins cannot be
used as port pins. Be sure to set the pull-up resistor option registers (PU20 to
PU23) to 0 for the pins set to A/D converter mode.
Although a 1-bit memory manipulation instruction manipulates 1 bit, it accesses
a port in 8-bit units. Therefore, the contents of the output latch of a pin in the
input mode, even if it is not subject to manipulation by the instruction, are
undefined in a port with a mixture of inputs and outputs.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16898EJ5V0UD
Cautions
23, 25, 26
pp. 22,
p. 30
p. 34
p. 34
p. 51
p. 55
p. 62
p. 65
p. 67
Page
(1/19)

Related parts for UPD78F9222MC(T)-5A4-A