PIC18F2320-E/SO Microchip Technology, PIC18F2320-E/SO Datasheet - Page 216

• Manufacturer Part Number: PIC18F2320-E/SO
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2320-E/SO

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2220/2320/4220/4320
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(AV
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in SLEEP, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
FIGURE 19-1:
DS39599G-page 214
REF
DD
+ and RA2/AN2/V
and AV
Note 1: Channels AN5 through AN7 are not available on PIC18F2X20 devices.
2: I/O pins have diode protection to V
SS
Converter
), or the voltage level on the RA3/AN3/
10-Bit
A/D
Reference
Voltage
A/D BLOCK DIAGRAM
REF
-/CV
REF
pins.
V
V
REFH
REFL
(Input Voltage)
VCFG1:VCFG0
V
AIN
DD
and V
X
X
1
0
0
1
X
X
AV
SS
.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH/ADRESL
registers, the GO/DONE bit (ADCON0 register) is
cleared and A/D Interrupt Flag bit, ADIF, is set. The block
diagram of the A/D module is shown in Figure 19-1.
DD
AV
SS
CHS3:CHS0
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
© 2007 Microchip Technology Inc.
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3/V
AN2/V
AN1
AN0
(1)
(1)
(1)
(2)
REF
REF
+
-