PIC18F2320-E/SO Microchip Technology, PIC18F2320-E/SO Datasheet - Page 296

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PIC18F2320-E/SO

Manufacturer Part Number
PIC18F2320-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2320-E/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2220/2320/4220/4320
SUBWFB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
DS39599G-page 294
Q Cycle Activity:
Decode
Q1
register ‘f’
Subtract W from f with Borrow
[ label ] SUBWFB
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – (W) – (C) → dest
N, OV, C, DC, Z
Subtract W and the Carry flag (bor-
row) from register ‘f’ (2’s complement
method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’ (default). If
‘a’ is ‘0’, the Access Bank will be
selected, overriding the BSR value. If
‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
1
1
Read
0101
Q2
10da
Process
Data
Q3
ffff
f [,d [,a]]
destination
Write to
Q4
ffff
Example 1:
Example 2:
Example 3:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
SUBWFB
SUBWFB REG, 0, 0
SUBWFB
0x19
0x0D
0x01
0x0C
0x0D
0x01
0x00
0x00
0x1B
0x1A
0x00
0x1B
0x00
0x01
0x01
0x00
0x03
0x0E
0x01
0xF5
0x0E
0x00
0x00
0x01
© 2007 Microchip Technology Inc.
REG, 1, 0
REG, 1, 0
(0001 1001)
(0000 1101)
(0000 1011)
(0000 1101)
; result is positive
(0001 1011)
(0001 1010)
(0001 1011)
; result is zero
(0000 0011)
(0000 1101)
(1111 0100)
; [2’s comp]
(0000 1101)
; result is negative

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