PIC18F2320-E/SO Microchip Technology, PIC18F2320-E/SO Datasheet - Page 57

• Manufacturer Part Number: PIC18F2320-E/SO
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2320-E/SO

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 5-1:
5.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off the stack, without disturbing normal program execu-
tion, is a desirable option. To push the current PC value
onto the stack, a PUSH instruction can be executed.
This will increment the Stack Pointer and load the cur-
rent PC value onto the stack. TOSU, TOSH and TOSL
can then be modified to place data or a return address
on the stack.
The ability to pull the TOS value off of the stack and
replace it with the value that was previously pushed
onto the stack, without disturbing normal execution, is
achieved by using the POP instruction. The POP instruc-
tion discards the current TOS by decrementing the
Stack Pointer. The previous value pushed onto the
stack then becomes the TOS value.
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-0
Note 1:
STKFUL
R/C-0
(1)
Bit 7 and bit 6 are cleared by user software or by a POR.
PUSH AND POP INSTRUCTIONS
STKFUL: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP4:SP0: Stack Pointer Location bits
STKUNF
R/C-0
STKPTR: STACK POINTER REGISTER
(1)
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U-0
—
(1)
PIC18F2220/2320/4220/4320
R/W-0
SP4
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
5.2.4
These Resets are enabled by programming the
STVREN bit in Configuration Register 4L. When the
STVREN bit is cleared, a full or underflow condition will
set the appropriate STKFUL or STKUNF bit but not
cause a device Reset. When the STVREN bit is set, a
full or underflow condition will set the appropriate
STKFUL or STKUNF bit and then cause a device
Reset. The STKFUL or STKUNF bits are cleared by the
user software or a POR Reset.
SP3
STACK FULL/UNDERFLOW RESETS
R/W-0
SP2
x = Bit is unknown
R/W-0
SP1
DS39599G-page 55
R/W-0
SP0
bit 0