VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 10

• Manufacturer Part Number: VS6624Q0KP
• Description: Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
• Manufacturer: STMicroelectronics

Specifications of VS6624Q0KP

• Description/function: Camera Module
• Interface Type: Two-Wire Serial
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

System architecture
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Figure 1.
3.1
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VL6624/VS6624
System architecture
The VS6624 consists of the following main blocks:
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A simplified block diagram is shown
Operation
A video timing generator controls a SXGA-sized pixel array to produce raw bayer images.
The analogue pixel information is digitized and passed into the video pipe. The video pipe
contains a number of different functions (explained in detail later). At the end of the video
pipe data is output to the host system over an 8-bit parallel interface along with qualification
signals.
The whole system is controlled by an embedded microprocessor that is running firmware
stored in an internal ROM. The external host communicates with this microprocessor over
an I²C interface. The microprocessor does not handle the video data itself but is able to
control all the functions within the video pipe. Real-time information about the video data is
gathered by a statistics engine and is available to the microprocessor. The processor uses
AVDD
GND
GND
VDD
CLK
CE
SXGA-sized pixel array
Video timing generator
Video pipe
Statistics gathering unit
Clock generator
Microprocessor
Video Timing
Generator
simplified block diagram
Generator
RESET
Clock
VREG
SXGA
Array
Pixel
Figure 1
.
Microprocessor
Video Pipe
I²C Interface
Gathering
Statistics
I²C
SDA
SCL
FSO
VSYNC
HSYNC
PCLK
D[0:7]
VL6624/VS6624