VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 22

• Manufacturer Part Number: VS6624Q0KP
• Description: Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
• Manufacturer: STMicroelectronics

Specifications of VS6624Q0KP

• Description/function: Camera Module
• Interface Type: Two-Wire Serial
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Output data formats
7
Line / Frame Blanking Data
YUV 4:2:2 data format
Figure 6.
22/106
HSYNC SIGNAL
8
0
1
0
Standard Y Cb Cr data order
Output data formats
The VL6624/VS6624 supports the following data formats:
●
●
●
●
●
●
●
The required data format is selected using the bdataFomat control found in the pipe setup
bank registers. The various options available for each format are controlled using the
bRgbsetup and bYuvSetup registers found in the
The values which are output during line and frame blanking are an alternating pattern of
0x10 and 0x80 by default. These values may be changed by writing to the BlankData_MSB
and BlankData_LSB registers in the
YUV 422 data format requires 4 bytes of data to represent 2 adjacent pixels. ITU601-656
defines the order of the Y, Cb and Cr components as shown in
The VL6624/VS6624 bYuvSetup register can be programmed to change the order of the
components as follows:
F
F
EAV Code
YUV4:2:2
YUV4:0:0
RGB565
RGB444 (encapsulated as 565)
RGB444 (zero padded)
Bayer 10-bit
Bayer 8-bit
0
0
0
0
X
Y
Cb
START OF DIGITAL ACTIVE LINE
packet
4-data
Y
Cr
Y
Cb
Output formatter control
Y
Cr
Output formatter control
Y
Cb
bank.
Y
Figure 6
Cr
.
Y
registers.
VL6624/VS6624