VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 30

• Manufacturer Part Number: VS6624Q0KP
• Description: Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
• Manufacturer: STMicroelectronics

Specifications of VS6624Q0KP

• Description/function: Camera Module
• Interface Type: Two-Wire Serial
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data synchronization methods
Figure 14. HSYNC timing example
Vertical synchronization (VSYNC)
30/106
EAV Code
FF
00 00 XY 80 10 80 10 80 10
In automatic mode the HSYNC signal envelops all the active video data on every line in the
output frame regardless of the programmed image size. Line codes (if selected) fall outside
the HSYNC envelope as shown in
If manual mode is selected then the pixel positions for HSYNC rising edge and falling edge
are programmable. The pixel position for the rising edge of HSYNC is programmed in the
bHSyncRising registers. The pixel position for the falling edge of HSYNC is programmed in
the bHSyncFalling registers.
The VSYNC signal is controlled by the bSyncSetup register. The following options are
available:
●
●
●
In automatic mode the VSYNC signal envelops all the active video lines in the output frame
regardless of the programmed image size as shown in
enable/disable
select polarity
manual or automatic
BLANKING DATA
hsync=0
80 10
SAV Code
FF
Figure 14
00 00 XY
.
D0 D1 D2 D3 D0 D1 D2 D3
ACTIVE VIDEO DATA
hsync=1
Figure 15
.
D2 D3 FF 00 00 XY
VL6624/VS6624
EAV Code