DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 128

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DSPIC33EP512MU810T-I/PT

Manufacturer Part Number
DSPIC33EP512MU810T-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 5-2:
REGISTER 5-3:
REGISTER 5-4:
DS70616E-page 128
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
Unimplemented: Read as ‘0’
NVMADRU<7:0>: Non-volatile Memory Upper Write Address bits
Selects the upper 8 bits of the location to program or erase in program Flash memory. This register
may be read or written by the user application.
NVMADR<15:0>: Non-volatile Memory Write Address bits
Selects the lower 16 bits of the location to program or erase in program Flash memory. This register
may be read or written by the user application.
Unimplemented: Read as ‘0’
NVMKEY<7:0>: Key Register (write-only) bits
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
NVMADRU: NON-VOLATILE MEMORY UPPER ADDRESS REGISTER
NVMADR: NON-VOLATILE MEMORY ADDRESS REGISTER
NVMKEY: NON-VOLATILE MEMORY KEY REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
R/W-x
R/W-x
R/W-x
W-0
U-0
NVMADRU<7:0>
U-0
NVMADR<15:8>
Preliminary
NVMADR<7:0>
NVMKEY<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
R/W-x
R/W-x
R/W-x
W-0
U-0
U-0
bit 8
bit 0
bit 8
bit 0
bit 8
bit 0

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