DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 323

• Manufacturer Part Number: DSPIC33EP512MU810T-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.0
The
PIC24EPXXXGU810/814 family of devices contain four
UART modules.
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the dsPIC33EPXXXMU806/810/814 and
PIC24EPXXXGU810/814 device family. The UART is a
full-duplex
communicate with peripheral devices, such as personal
computers, LIN, RS-232 and RS-485 interfaces. The
module also supports a hardware flow control option
with the UxCTS and UxRTS pins and also includes an
IrDA
FIGURE 20-1:
 2009-2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
®
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
encoder and decoder.
2: Some registers and associated bits
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
dsPIC33EPXXXMU806/810/814
of the dsPIC33EPXXXMU806/810/814
and PIC24EPXXXGU810/814 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 17. “UART”
(DS70582) of the “dsPIC33E/PIC24E
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
asynchronous
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
system
UART Transmitter
UART Receiver
IrDA
that
®
and
can
Preliminary
in
The primary features of the UART module are:
• Full-Duplex, 8- or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or two stop bits
• Hardware flow control option with UxCTS and
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 3.75 Mbps to 57 bps at 16x
• Baud rates ranging from 15 Mbps to 228 bps at 4x
• 4-deep First-In First-Out (FIFO) Transmit Data
• 4-deep FIFO Receive Data buffer
• Parity, framing and buffer overrun error detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive interrupts
• A separate interrupt for all UART error conditions
• Loopback mode for diagnostic support
• Support for Sync and Break characters
• Support for automatic baud rate detection
• IrDA
• 16x baud clock output for IrDA support
A simplified block diagram of the UART module is
shown in
these key hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
the UxTX and UxRX pins
UxRTS pins
prescaler
mode at 60 MIPS
mode at 60 MIPS
buffer
(9th bit = 1)
®
encoder and decoder logic
Figure
20-1. The UART module consists of
UxTX
UxRTS
UxCTS
UxRX
DS70616E-page 323