EVAL-ADUC7060QSPZ Analog Devices Inc, EVAL-ADUC7060QSPZ Datasheet - Page 86

• Manufacturer Part Number: EVAL-ADUC7060QSPZ
• Description: Quick Start Development System
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ PLUS Kitr
• Type: MCU, ARM7r

Specifications of EVAL-ADUC7060QSPZ

• Contents: Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC7060
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q5189809

ADuC7060
I
Name:
Address:
Default value:
Access:
Function:
Table 99. I2CADR1 MMR in 10-Bit Address Mode
Bit
7:0
2
C Address 1, I2CADR1, Register
Name
I2CLADR
I2CADR1
0xFFFF091C
0x00
Read and write
This 8-bit MMR is used in 10-bit addressing
mode only. This register contains the least
significant byte of the address.
Description
These bits contain ADDR[7:0] in 10-bit
addressing mode.
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I
Name:
Address:
Default value:
Access:
Function:
Table 100. I2CDIV MMR
Bit
15:8
7:0
I
I
Name:
Address:
Default value:
Access:
Function:
2
2
2
C Slave Registers
C Master Clock Control, I2CDIV, Register
C Slave Control, I2CSCON, Register
Name
DIVH
DIVL
Description
These bits control the duration of the high
period of SCL.
These bits control the duration of the low period
of SCL.
I2CDIV
0xFFFF0924
0x1F1F
Read and write
This MMR controls the frequency of the I
clock generated by the master on to the SCL
pin. For further details, see the Serial Clock
Generation section.
I2CSCON
0xFFFF0928
0x0000
Read and write
This 16-bit MMR configures the I
in slave mode.
2
C peripheral
2
C