DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 131

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DS3102GN

Manufacturer Part Number
DS3102GN
Description
Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
Manufacturer
Maxim Integrated Products
Datasheet

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Table 10-6. LVPECL Level-Compatible Output Pins
(V
Figure 10-1. Recommended Termination for LVDS Pins
Figure 10-2. Recommended Termination for LVPECL Signals on LVDS Input Pins
19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
Differential Output Voltage
Output Offset (Common Mode) Voltage
Difference in Magnitude of Output
Differential Voltage for Complementary
States
Note 1:
Note 2:
DD
= 1.8V 10%; V
DRIVER
With 100  load across the differential outputs.
The differential outputs can easily be interfaced to LVDS, LVPECL, and CML inputs on neighboring ICs using a few external
passive components. See
LVDS
PARAMETER
DDIO
50
50
= 3.3V 5%, T
DRIVER
LVPECL
Maxim App Note HFAN-1.0
100
(5%)
A
SYMBOL
ICnPOS
ICnNEG
V
= -40°C to +85°C)
V
V
DOSPECL
50
50
ODPECL
OSPECL
130
82
for details.
DS3102
LVDS
GND
3.3V
I/O
+25C (Note 1)
CONDITIONS
130
82
ICnPOS
ICnNEG
OCnNEG
OCnPOS
DS3102
LVDS
INPUTS
MIN
50
50
595
100
(5%)
TYP
700
0.8
RECEIVER
LVDS
MAX
930
50
131 of 142
UNITS
mV
mV
V

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