DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 91

• Manufacturer Part Number: DS3102GN
• Description: Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: The DIVN1 and DIVN2 registers must be read consecutively and written consecutively. See Section 8.3.
Bits 7 to 0: DIVN Factor (DIVN[7:0]). The full 16-bit DIVN[15:0] field spans this register and DIVN2. This field
contains the integer value used to divide the frequency of input clocks that are configured for DIVN mode. The
frequency is divided by DIVN[15:0] + 1. See Section 7.4.2.4.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: DIVN Factor (DIVN[15:8]). See the
19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
7
1
7
0
6
1
6
0
DIVN1
DIVN Register 1
46h
DIVN2
DIVN Register 2
47h
5
1
5
1
DIVN1
register description.
4
1
4
1
DIVN[15:8]
DIVN[7:0]
3
1
1
3
2
1
2
1
1
1
1
1
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0
1
0
1