DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 136

• Manufacturer Part Number: DS3102GN
• Description: Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
• Manufacturer: Maxim Integrated Products

10.5 JTAG Interface Timing
Table 10-11. JTAG Interface Timing
(V
Figure 10-5. JTAG Timing Diagram
19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
JTCLK Clock Period
JTCLK Clock High/Low Time (Note 1)
JTCLK to JTDI, JTMS Setup Time
JTCLK to JTDI, JTMS Hold Time
JTCLK to JTDO Delay
JTCLK to JTDO High-Z Delay (Note 2)
JTRST Width Low Time
Note 1:
Note 2:
DD
= 1.8V 10%; V
JTDI, JTMS, JTRST
Clock can be stopped high or low.
Not tested during production test.
JTRST
JTCLK
JTDO
PARAMETER
DDIO
= 3.3V 5%, T
t6
t7
t2
A
= -40°C to +85°C.) (See
t4
SYMBOL
t2/t3
t1
t1
t4
t5
t6
t7
t8
t5
MIN
100
50
50
50
2
2
t3
Figure
t8
10-5.)
1000
TYP
500
MAX
50
50
136 of 142
UNITS
ns
ns
ns
ns
ns
ns
ns