LAN9303I-ABZJ SMSC, LAN9303I-ABZJ Datasheet - Page 152

• Manufacturer Part Number: LAN9303I-ABZJ
• Description: Ethernet ICs 3 Port 0/100 Ether Switch MII/RMII/Turb
• Manufacturer: SMSC

Specifications of LAN9303I-ABZJ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.4 (07-07-10)
13.2.4
13.2.4.1
BITS
31:7
6
5
4
3
2
RESERVED
Port 1 Backpressure Enable (BP_EN_1)
This bit enables/disables the generation of half-duplex backpressure on
switch Port 1.
0: Disable backpressure
1: Enable backpressure
Port 1 Current Duplex (CUR_DUP_1)
This bit indicates the actual duplex setting of switch Port 1.
0: Full-Duplex
1: Half-Duplex
Port 1 Current Receive Flow Control Enable (CUR_RX_FC_1)
This bit indicates the actual receive flow setting of switch Port 1.
0: Flow control receive is currently disabled
1: Flow control receive is currently enabled
Port 1 Current Transmit Flow Control Enable (CUR_TX_FC_1)
This bit indicates the actual transmit flow setting of switch Port 1.
0: Flow control transmit is currently disabled
1: Flow control transmit is currently enabled
Port 1 Full-Duplex Receive Flow Control Enable (RX_FC_1)
When the MANUAL_FC_1 bit is set, or Auto-Negotiation is disabled, this bit
enables/disables the detection of full-duplex Pause packets on switch Port 1.
0: Disable flow control receive
1: Enable flow control receive
Switch Fabric
This section details the memory mapped System CSR’s which are related to the Switch Fabric. The
flow control of all three ports of the Switch Fabric can be configured via the memory mapped System
CSR’s MANUAL_FC_1, MANUAL_FC_2 and MANUAL_FC_0. The MAC address used by the switch
for Pause frames is configured via the SWITCH_MAC_ADDRH and SWITCH_MAC_ADDRL registers.
In addition, the SWITCH_CSR_CMD, SWITCH_CSR_DATA and SWITCH_CSR_DIRECT_DATA
registers serve as a memory mapped accessible interface to the full range of otherwise inaccessible
switch control and status registers. A list of all the Switch Fabric CSRs can be seen in
For additional information on the Switch Fabric, including a full explanation on how to use the Switch
Fabric CSR interface registers, refer to
descriptions of the Switch Fabric CSR’s that are accessible via these interface registers, refer to
section
Port 1 Manual Flow Control Register (MANUAL_FC_1)
This read/write register allows for the manual configuration of the switch Port 1 flow control. This
register also provides read back of the currently enabled flow control settings, whether set manually
or Auto-Negotiated. Refer to
information.
Note: The flow control values in the PHY_AN_ADV_1 register (see
within the PHY are not affected by the values of this register.
Section 13.4, "Switch Fabric Control and Status
Offset:
1A0h
DESCRIPTION
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Section 6.2.3, "Flow Control Enable Logic," on page 62
DATASHEET
152
Chapter 6, "Switch Fabric," on page
Size:
Registers".
32 bits
Section 13.3.2.5, on page
TYPE
R/W
R/W
SMSC LAN9303/LAN9303i
RO
RO
RO
RO
59. For detailed
for additional
DEFAULT
Note 13.4
Note 13.5
Note 13.5
Note 13.5
Note 13.6
Table
Datasheet
-
13.14.
199)