LAN9303I-ABZJ SMSC, LAN9303I-ABZJ Datasheet - Page 52

• Manufacturer Part Number: LAN9303I-ABZJ
• Description: Ethernet ICs 3 Port 0/100 Ether Switch MII/RMII/Turb
• Manufacturer: SMSC

Specifications of LAN9303I-ABZJ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.4 (07-07-10)
4.2.4.2
STRAP NAME
manual_FC_strap_0
SQE_test_disable_strap_0
mngt_mode_strap[1:0]
eeprom_size_strap
STRAP NAME
Hard-Straps
Hard-straps are latched upon Power-On Reset (POR) or pin reset (nRST) only. Unlike soft-straps,
hard-straps always have an associated pin and cannot be overridden by the EEPROM Loader. These
straps are used as either direct configuration values or as register defaults.
all hard-straps and their associated pins. These straps, along with their pin assignments are also
defined in
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
Chapter 3, "Pin Description and Configuration," on page
Table 4.3 Hard-Strap Configuration Strap Definitions
DESCRIPTION
Port 0 (External MII) Manual Flow Control Enable Strap:
This strap affects the default value of the following register
bits:
Refer to the respective register definition sections for
additional information.
Note:
SQE Heartbeat Disable Strap: Configures the default
value of the
Control/Status Register
(VPHY_SPECIAL_CONTROL_STATUS)
mode. It is not used in RMII PHY or MII MAC modes.
Serial Management Mode Strap: Configures the default
serial management mode.
00 = RESERVED
01 = SMI Managed Mode
10 = I
11 = RESERVED
Refer to
additional information on the various modes of the device.
EEPROM Size Strap: Configures the EEPROM size range
as specified in
Controller," on page
Port 0 Full-Duplex Manual Flow Control Select
(MANUAL_FC_0)
Register (MANUAL_FC_0)
Asymmetric Pause
Virtual PHY Auto-Negotiation Advertisement Register
(VPHY_AN_ADV)
2
C Managed Mode
Section 2.3, "Modes of Operation," on page 19
In MAC mode, this strap is not used. In this mode,
the Virtual PHY is not applicable, and full-duplex
flow control must be controlled manually by the
host, based upon the external PHYs Auto-
negotiation results.
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
SQEOFF
Section 8.3, "I2C Master EEPROM
DATASHEET
bit in the
107.
and
DESCRIPTION
bit of the
52
Symmetric Pause
Port 0 Manual Flow Control
Virtual PHY Special
when in MII PHY
bits of the
23.
for
Table 4.3
SMSC LAN9303/LAN9303i
PIN / DEFAULT
VALUE
0b
0b
MNGT1_LED4P :
MNGT0_LED3P
E2PSIZE_LED2P
provides a list of
Note 4.1
Note 4.1
PIN(S)
Datasheet