LAN9311I-NZW Standard Microsystems (SMSC), LAN9311I-NZW Datasheet - Page 248

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LAN9311I-NZW

Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9311I-NZW

Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9311I-NZW
Manufacturer:
Standard
Quantity:
836
Part Number:
LAN9311I-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Revision 1.7 (06-29-10)
BITS
5:0
7
6
Collision Test (VPHY_COL_TEST)
This bit enables/disables the collision test mode. When set, the collision
signal to the Host MAC is active during transmission from the Host MAC.
Note:
0: Collision test mode disabled
1: Collision test mode enabled
Speed Select MSB (VPHY_SPEED_SEL_MSB)
This bit is not used by the Virtual PHY and has no effect. The value returned
is always 0.
RESERVED
Note 14.16 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
It is recommended that this bit be used only when in loopback
mode.
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
DESCRIPTION
DATASHEET
248
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
TYPE
R/W
SMSC LAN9311/LAN9311i
RO
RO
DEFAULT
Datasheet
0b
0b
-

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