AM79C972BVD\W AMD (ADVANCED MICRO DEVICES), AM79C972BVD\W Datasheet - Page 2

• Manufacturer Part Number: AM79C972BVD\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C972BVD\W

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

n Supports up to 1 megabyte (Mbyte) optional
n Look-Ahead Packet Processing (LAPP) data
n Programmable Inter Packet Gap (IPG) to
n Offers the Modified Back-Off algorithm to
n IEEE 1149.1-compliant JTAG Boundary Scan
GENERAL DESCRIPTION
The Am79C972 PCnet-FAST+ controller is a highly-
integrated 32-bit full-duplex, 10/100-Megabit per sec-
ond (Mbps) Ethernet controller solution, designed to
address high-performance system application require-
ments. It is a flexible bus mastering device that can be
used in any application, including network-ready PCs
and bridge/router designs. The bus master architecture
provides high data throughput and low CPU and sys-
tem bus utilization. The Am79C972 controller is fabri-
cated with advanced low-power 3.3-V CMOS process
to provide low operating current for power sensitive ap-
plications.
The Am79C972 PCnet-FAST+ controller also has sev-
eral e nha nce men ts over its pr edec es so r, th e
Am79C971 PCnet-FAST device. In addition to integrat-
ing the SRAM on chip, it further reduces system imple-
mentation cost by the addition of a new EEPROM
programmable pin (PHY_RST), an internal oscillator
circuit eliminating the need for an external crystal, and
the integration of the PAL function needed for Magic
Packet application. The PHY_RST pin is implemented
to reset the external PHY without increasing the load to
the PCI bus and to block RST to the PHY when PG
input is LOW.
The 32-bit multiplexed bus interface unit provides a di-
rect interface to the PCI local bus, simplifying the
design of an Ethernet node in a PC system. The
Am79C972 PCnet-FAST+ controller provides the com-
plete interface to an Expansion ROM or Flash device
allowing add-on card designs with only a single load
per PCI bus interface pin. With its built-in support for
both little and big endian byte alignment, this controller
also addresses non-PC applications. The Am79C972
controller’s advanced CMOS design allows the bus in-
terface to be connected to either a +5-V or a +3.3-V sig-
naling environment. A compliant IEEE 1149.1 JTAG
2
Boot PROM or Flash for diskless node
application
handling technique reduces system overhead
by allowing protocol analysis to begin before
the end of a receive frame
address less network aggressive MAC
controllers
address the Ethernet Capture Effect
test access port interface and NAND tree test
mode for board-level production connectivity
test
Am79C972
n Software compatible with AMD PCnet Family
n Compatible with the existing PCnet Family
n Available in 160-pin PQFP and 176-pin TQFP
n +3.3 V power supply with 5 V tolerant I/Os
n Extensive programmable internal/external
n Supports patented External Address Detection
test interface for board-level testing is also provided, as
well as a NAND tree test structure for those systems
that cannot support the JTAG interface.
The Am79C972 PCnet-FAST+ controller is also com-
pliant with the PC97, PC98, and Net PC specifications.
It includes the full implementation of the Microsoft
OnNow and ACPI specifications, which are backward
compatible with the Magic Packet technology, and is
compliant with the PCI Bus Power Management Inter-
face Specification by supporting the four power man-
agement states (D0, D1, D2, and D3), the optional
PME pin, and the necessary configuration and data
registers.
The Am79C972 PCnet-FAST+ controller is ideally
suited for Network PC (Net PC), motherboard, network
interface card (NIC), and embedded designs. It is avail-
able in a 160-pin Plastic Quad Flat Pack (PQFP) pack-
age and also in a 176-pin Thin Quad Flat Pack (TQFP)
package for form factor sensitive designs.
The Am79C972 PCnet-FAST+ controller is a complete
Ethernet node integrated into a single VLSI device. It
contains a bus interface unit, a Direct Memory Access
(DMA) Buffer Management Unit, an ISO/IEC 8802-3
(IEEE 802.3)-compliant Media Access Controller
(MAC), a large Transmit FIFO and a large Receive
FIFO, and an IEEE 802.3-compliant MII. Both IEEE
802.3 compliant full-duplex and half-duplex operations
are supported on the MII and GPSI interfaces. 10/100
Mbps operation is supported through the MII.
The Am79C972 PCnet-FAST+ controller is register
compatible with the LANCE™ (Am7990) and C-
LANCE™ (Am79C90) Ethernet controllers, and all
Ethernet controllers in the PCnet Family except
ILACC™ (Am79C900), including the PCnet-ISA™ con-
troller (Am79C960), PCnet-ISA+™ (Am79C961),
and LANCE/C-LANCE register and descriptor
architecture
driver and diagnostic software
packages
enables broad system compatibility
loopback capabilities
Interface (EADI)