TS86101G2BCGL E2V, TS86101G2BCGL Datasheet - Page 20

no-image

TS86101G2BCGL

Manufacturer Part Number
TS86101G2BCGL
Description
Manufacturer
E2V
Datasheet

Specifications of TS86101G2BCGL

Lead Free Status / RoHS Status
Not Compliant
5. Functional Description
5.1
20
Device Overview
0992D–BDC–04/09
The TS86101G2B is a 10-bit 1.2 Gsps DAC with an integrated 4:1 input MUX, designed for synthesiza-
tion of broadband signals, with enhanced linearity and band flatness performances.
The TS86101G2B is manufactured using full Si bipolar technology. Due to its integrated input 4:1 MUX,
this digital-to-analog converter enables the user to address data rates of only ¼ of the effective sampling
frequency (up to 350 Msps input rate), facilitating its interface with state-of-the art FPGAs, ASICs and
DSPs.
The device requires an input Data Ready clock for the data acquisition as well as an output DSP clock,
used for synchronization with the DSP/FPGA/ASIC. This DSP clock is phase programmable thanks to
the <CS_0;CS_3> 4-bit clock phase shift select function of the device.
The analog output is 2 Vpp in differential mode or 1 Vpp in single-ended mode and a diode pin is pro-
vided for die junction temperature monitoring.
Table 5-1.
Name
V
V
V
AGND
DGND
<A0_T:A9_T>
<A0_F:A9_F>
<B0_T:B9_T>
<B0_F:B9_F>
<C0_T:C9_T>
<C0_F:C9_F>
<D0_T:D9_T>
<D0_F:D9_F>
OUT_T,OUT_F
D_CK_T, D_CK_F
DSP_CK_T
DSP_CK_F
CW_IN_T
CW_IN_F
<CS_0:CS_3>
DIODE
GA
EEA
EED
CCD
Description of Functions
Function
Analog power supply
Digital power supply
Digital power supply
Analog ground
Digital ground
Differential input data port A
Differential input data port B
Differential input data port C
Differential input data port D
Differential analog output
Differential Data Ready clock inputs
Differential DSP clock output
Differential independent master clock input
Shift select for DSP clock (TTL)
Die junction temperature monitoring
Gain adjust (to be connected to the REF pin)
e2v semiconductors SAS 2009
TS86101G2B

Related parts for TS86101G2BCGL