W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 135

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

11.2.29
When the device is in Extended Function mode and EFIR is 25H, the CR25 register can be accessed
through EFDR. Default = BEH if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions are
as follows:
This register is used to select the base address of the UART B from 100H-3F8H on 8-byte
boundaries. NCS = 0 and A10 = 0 are required to access the UART B registers. A[2:0] are don't-care
conditions.
URBAD7-URBAD1 (Bit 7-bit 1): match A[9:3]. Bit 7 = 0 and bit 6 = 0 disable this decode.
Bit 0: Reserved, fixed at zero.
11.2.30
When the device is in Extended Function mode and EFIR is 26H, the CR26 register can be accessed
through EFDR. Default = 23H if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions are
as follows:
FDCDQS3-FDCDQS0 (Bit 7-bit 4): Allocate DMA resource for FDC.
PRTDQS3-PRTDQS0 (Bit 3-bit 0): Allocate DMA resource for PRT.
Configuration Register 25 (CR25)
Configuration Register 26 (CR26)
BIT 7- BIT4, BIT 3 - BIT 0
0000
0001
0010
0011
7
7
6
6
5
5
4
4
3
3
- 128 -
2
2
W83877ATF/W83877ATG
1
1
0
0
reserved
URBAD1
URBAD2
URBAD3
URBAD4
URBAD5
URBAD6
URBAD7
PRTDQS0
PRTDQS1
PRTDQS2
PRTDQS3
FDCDQS0
FDCDQS1
FDCDQS2
FDCDQS3
DMA SELECTED
DMA_A
DMA_B
DMA_C
None