W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 162

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

11.4.3 Power Management 1 Enable Register 1(PM1EN1)
Register Location:
Default Value:
Attribute:
Size:
11.4.4 Power Management 1 Enable Register 2 (PM1EN2)
Register Location:
Default Value:
Attribute:
Size:
0
1-4
5
6-7
0-7
BIT
BIT
TMR_EN
Reserved
GBL_EN
Reserved
Reserved
NAME
NAME
Reserved. These bits always return a value of zero.
<CR33>+2H System I/O Space
00h
Read/write
8 bits
This is the timer carry interrupt enable bit. When this bit is set, an SCI event
is generated anytime the TMR_STS bit is set. When this bit is reset no
interrupt is generated when the TMR_STS bit is set.
Reserved. These bits always return a value of zero.
The global enable bit. When both the GBL_EN bit and the GBL_STS bit are
set, an SCI interrupt is raised.
Reserved.
<CR33>+3H System I/O Space
00h
Read/write
8 bits
7
7
6
6
5
5
4
4
3
3
2
- 155 -
2
DESCRIPTION
1
DESCRIPTION
W83877ATF/W83877ATG
1
0
0
Publication Release Date:November 2006
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
TMR_EN
Reserved
Reserved
Reserved
GBL_EN
Reserved
Reserved
Reserved
Version 1.0