W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 64

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.3.3
6.3.3.1. Set1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL)
The two registers of BLL and BHL are baud rate divisor latch in the legacy UART/SIR/ASK-IR mode.
Read/Write these registers, if set in Advanced UART mode, will occur backward operation, that is, will
go to legacy UART mode and clear some register values shown in the table below.
Note that DIS_BACK=1 (Disable Backward operation) in legacy UART/SIR/ASK-IR mode will not
affect any register which can operate legacy SIR/ASK-IR.
6.3.3.2. Set1.Reg 2~7
These registers are defined the same as the Set 0 registers.
ADDRESS
OFFSET
0
1
2
3
4
5
6
7
Set1 - Legacy Baud Rate Divisor Register
Set & Register
Set 0.Reg 4
Set 2.Reg 2
Set 4.Reg 3
UDR/ESCR
REGISTER
UCR/SSR
ISR/UFR
NAME
HCR
BHL
USR
HSR
BLL
Baud Rate Divisor Latch (Low Byte)
Baud Rate Divisor Latch (High Byte)
Interrupt Status or UART FIFO Control Register
UART Control or Sets Select Register
Handshake Control Register
UART Status Register
Handshake Status Register
User Defined Register
Advanced Mode
DIS_BACK=×
Bit 0, 5, 7
Bit 7~5
Bit 2, 3
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REGISTER DESCRIPTION
W83877ATF/W83877ATG
Publication Release Date:November 2006
Legacy Mode
DIS_BACK=0
Bit 5, 7
-
-
Version 1.0