W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 55

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

All Set s registers have a common register which is Sets Select Register (SSR), in order to switch to
any Set when configuring this register. The summary description of these Sets is shown below.
6.3.2
6.3.2.1. Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write)
Receiver Buffer Register is read only and Transmitter Buffer Register is write only. These registers are
described the ame as legacy UART.
In legacy UART, this port only supports PIO mode. In dvanced UART, if setup to MIR/FIR/Remote IR,
this port will support DMA handshake function. Two DMA channels can be used, that is, one TX DMA
channel and another RX DMA channel. Therefore, single DMA channel is also supported when the bit
of D_CHSW (DMA Channel Swap, in Set2.Reg2.Bit3) is set and the TX/RX DMA channel is swapped.
Note that two DMA channels are defined in config register CR2A, which selects DMA channel or
disables DMA channel. If RX DMA channel is enabled and TX DMA channel is disabled, then the
single DMA channel will be selected.
ADDRESS
OFFSET
SET
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Set0-Legacy/Advanced UART Control and Status Registers
UART
○
○
REGISTER NAME
UDR/ESCR
IR MODE
RBR/TBR
UCR/SSR
ISR/UFR
HCR
USR
HSR
ICR
○
○
○
○
○
○
○
○
Legacy/Advanced UART Control and Status Registers.
Legacy Baud Rate Divisor Register.
Advanced UART Control and Status Registers.
Version ID and Mapped Control Registers.
Transmitter/Receiver/Timer
Registers.
Flow Control and IR Control and Frame Status FIFO Registers.
IR Physical Layer Control Registers
Remote Control and IR front-end Module Selection Registers.
Receiver/Transmitter Buffer Registers
Interrupt Control Register
Interrupt Status or UART FIFO Control Register
UART Control or Sets Select Register
Handshake Control Register
UART Status Register
Handshake Status Register
User Defined Register
- 48 -
SETS DESCRIPTION
W83877ATF/W83877ATG
REGISTER DESCRIPTION
Counter
Registers
and
IR
Control