FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 147
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FDC37M817-MS
Manufacturer Part Number
FDC37M817-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37M817-MS.pdf
(198 pages)
Specifications of FDC37M817-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Part Number:
FDC37M817-MS
Manufacturer:
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Note:
Note:
Note:
Note:
Note 1: The default value of the Primary Interrupt Select register for logical device 0 is 0x06.
Interrupt
Request Level
Select 0
Default = 0x00
or 0X06
(Note 1)
on VCC POR,
VTR POR, SOFT
RESET and
HARD RESET
Parallel IRQ mode.
NAME
nSMI must be disabled to use IRQ2.
An Interrupt is activated by setting the Interrupt Request Level Select 0 register to a non-zero
value AND :
IRQ pins must tri-state if not used/selected by any Logical Device. Refer to Note A.
All IRQ’s are available in Serial IRQ mode. Only IRQ[3:7] and IRQ[10:12] are available in
For the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
For the PP logical device by setting IRQE, bit D4 of the Control Port and in addition
For the PP logical device in ECP mode by clearing serviceIntr, bit D2 of the ecr.
For the Serial Port logical device by setting any combination of bits D0-D3 in the IER
For the RTC by (refer to the RTC section of this spec).
For the KYBD logical device (refer to the KYBD controller section of this spec).
Table 56 - Interrupt Select Configuration Register Description
0x70 (R/W)
REG INDEX
and by setting the OUT2 bit in the UART's Modem Control (MCR) Register.
Bits[3:0] selects which interrupt level is used for Interrupt 0.
Note: All interrupts are edge high (except ECP/EPP)
Note: nSMI is active low
0x00= no interrupt selected
0x01= IRQ1
0x02= IRQ2/nSMI
0x03= IRQ3
0x04= IRQ4
0x05= IRQ5
0x06= IRQ6
0x07= IRQ7
0x08= IRQ8
0x09= IRQ9
0x0A= IRQ10
0x0B= IRQ11
0x0C= IRQ12
0x0D= IRQ13
0x0E= IRQ14
0x0F= IRQ15
147
DEFINITION
STATE
C
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