FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 66

• Manufacturer Part Number: FDC37M817-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M817-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

the beginning of the sync field for the purposes of
avoiding write splices in the presence of motor
speed variation.
For the Write Data case, the FDC activates Write
Gate at the beginning of the sync field under the
conventional mode. The controller then writes a
new sync field, data address mark, data field, and
CRC.
perpendicular drive, the write head must be
activated in the Gap2 field to insure a proper write
of the new sync field.
perpendicular mode (WGATE = 1, GAP = 1), 38
bytes will be written in the Gap2 space. Since the
bit density is proportional to the data rate, 19 bytes
will be written in the Gap2 field for the 500 Kbps
perpendicular mode (WGATE = 1, GAP =0).
It should be noted that none of the alterations in
Gap2 size, VCO timing, or Write Gate timing affect
normal program flow. The information provided
here is just for background purposes and is not
needed
Perpendicular Mode command is invoked, FDC
software behavior from the user standpoint is
unchanged.
The perpendicular mode command is enhanced to
allow
Perpendicular recording drives. This enhancement
allows
specific
for
With
data
normal
the
drives
pre-erase
operation.
transfers
to
For the 1 Mbps
be
head
Once
designated
between
of
the
the
66
Conventional and Perpendicular drives without
having to issue Perpendicular mode commands
between the accesses of the different drive types,
nor having to change write pre-compensation
values.
When both GAP and WGATE bits of the
PERPENDICULAR MODE COMMAND are both
programmed to "0" (Conventional mode), then D0,
D1, D2, D3, and D4 can be programmed
independently to "1" for that drive to be set
automatically to Perpendicular mode. In this mode
the following set of conditions also apply:
1. The GAP2 written to a perpendicular drive
2. The write pre-compensation given to a
3. For D0-D3 programmed to "0" for conventional
Note: Bits D0-D3 can only be overwritten when
Software and hardware resets have the following
effect
COMMAND:
1. "Software" resets (via the DOR or DSR
2. "Hardware" resets will clear all bits (GAP,
during a write operation will depend upon the
programmed data rate.
perpendicular mode drive will be 0ns.
mode drives any data written will be at the
currently programmed write pre-compensation.
registers) will only clear GAP and WGATE bits
to "0". D0-D3 are unaffected and retain their
previous value.
WGATE and D0-D3) to "0", i.e all conventional
mode.
OW is programmed as a "1". If either GAP
or WGATE is a "1" then D0-D3 are
ignored.
on
the
PERPENDICULAR
MODE