FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 23

• Manufacturer Part Number: FDC37M817-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M817-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

DATA RATE SELECT REGISTER (DSR)
Address 3F4 WRITE ONLY
This register is write only. It is used to program
the data rate, amount of write precompensation,
power down status, and software reset. The data
rate is programmed using the Configuration
Control Register (CCR) not the DSR, for PC/AT
and PS/2 Model 30.
BIT 0 and 1 DATA RATE SELECT
These bits control the data rate of the floppy
controller.
corresponding to the individual data rates. The
data rate select bits are unaffected by a software
reset, and are set to 250 Kbps after a hardware
reset.
BIT
SELECT
These three bits select the value of write
precompensation that will be applied to the
WDATA output signal.
precompensation values for the combination of
these bits settings. Track 0 is the default starting
track number to start precompensation. this
starting track number can be changed by the
configure command.
2
RESET
COND.
through
See Table 9 for the settings
RESET
4
S/W
7
0
PRECOMPENSATION
Table 11 shows the
POWER
DOWN
6
0
5
0
0
COMP2
PRE-
23
4
0
Other applications can set the data rate in the
DSR. The data rate of the floppy controller is the
most recent write of either the DSR or CCR. The
DSR is unaffected by a software reset.
hardware reset will set the DSR to 02H, which
corresponds to the default precompensation
setting and 250 Kbps.
BIT 5 UNDEFINED
Should be written as a logic "0".
BIT 6 LOW POWER
A logic "1" written to this bit will put the floppy
controller into manual low power mode. The
floppy controller
software reset or access to the Data Register or
Main Status Register.
BIT 7 SOFTWARE RESET
This active high bit has the same function as the
DOR RESET (DOR bit 2) except that this bit is self
clearing.
Note: The DSR is Shadowed in the Floppy Data
Rate Select Shadow Register, LD8:CRC2[7:0].
separator circuits will be turned off. The controller
will come out of manual low power.
COMP1
PRE-
3
0
COMP0
PRE-
2
0
clock
DRATE
and data mode after a
SEL1
1
1
DRATE
SEL0
0
0
A