FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 83

• Manufacturer Part Number: FDC37M817-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M817-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

The FDC37M81x incorporates an IBM XT/AT
compatible parallel port.
optional PS/2 type bi-directional parallel port
(SPP), the Enhanced Parallel Port (EPP) and the
Extended Capabilities Port (ECP) parallel port
modes. Refer to the Configuration Registers for
information on disabling, power down, changing
the base address of the parallel port, and selecting
the mode of operation.
The FDC37M81x also provides a mode for support
of the floppy disk controller on the parallel port.
The parallel port also incorporates SMSC's
ChiProtect circuitry, which prevents possible
damage to the parallel port due to printer power-
up.
Note 1: These registers are available in all modes.
Note 2: These registers are only available in EPP mode.
Note 3: For EPP mode, IOCHRDY must be connected to the ISA bus.
DATA PORT
STATUS PORT
CONTROL
PORT
EPP ADDR
PORT
EPP DATA
PORT 0
EPP DATA
PORT 1
EPP DATA
PORT 2
EPP DATA
PORT 3
STROBE
TMOUT
PD0
PD0
PD0
PD0
PD0
PD0
D0
AUTOFD
PD1
PD1
PD1
PD1
PD1
PD1
This supports the
D1
0
nINIT
PD2
PD2
PD2
PD2
PD2
PD2
D2
0
PARALLEL PORT
nERR
PD3
SLC
PD3
PD3
PD3
PD3
PD3
D3
83
The functionality of the Parallel Port is achieved
through the use of eight addressable ports, with
their associated registers and control gating. The
control and data port are read/write by the CPU,
the status port is read/write in the EPP mode. The
address map of the Parallel Port is shown below:
DATA PORT
STATUS PORT
CONTROL PORT
EPP ADDR PORT
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
The bit map of these registers is:
SLCT
IRQE
PD4
PD4
PD4
PD4
PD4
PD4
D4
PCD
PD5
PD5
PD5
PD5
PD5
PD5
D5
PE
nACK
PD6
PD6
PD6
PD6
PD6
PD6
D6
BASE ADDRESS + 00H
BASE ADDRESS + 01H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
0
nBUSY
PD7
PD7
PD7
PD7
PD7
PD7
D7
0
Note
2,3
2,3
2,3
2,3
2,3
1
1
1