PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 261

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
17.7
Depending on the settings of the TIE, RIE and CDE bits
in the SSI_CTL register, the SSI unit can generate inter-
rupts. This is best illustrated by
RXFES and TXFES are the internal receive and transmit
framing error conditions. When an SSI interrupt is detect-
ed, the interrupt service routine should check all status
bits.The interrupts should be set up as level-triggered in-
terrupts.
17.8
The SSI unit supports both access orders for the 16-bit
halves of a machine word. In addition, the shift direction
can be controlled to select MSB or LSB shifting first. The
SSI_CTL.EMS bit controls the 16-bit endian mode, and
Figure 17-8. Interrupt generation logic.
Figure 17-9. 16-bit endian and shift direction operation.
INTERRUPT GENERATION
16-BIT ENDIAN-NESS AND SHIFT
DIRECTION
EMS = 1, TSD = 0
EMS = 1, TSD = 1
EMS = 0, TSD = 1
EMS = 0, TSD = 0
TXFES
RXFES
TUE
TDE
ROE
RDF
SSI_TXDATA
SSI_TXDATA
SSI_TXDATA
SSI_TXDATA
SSI_RXFSX
SSI_RXFSX
SSI_RXFSX
SSI_RXFSX
Figure
or
or
SSI_TXDR
17-8. Note:
D16 D15 D14 D13 ....... D2
D31 D0
D0
D15 D16 D17 D18 ....... D29 D30 D31 D0
TIE
RIE
D31 D30 D29 ....... D18 D17 D16 D15 D14 D13 ....... D2
D1
31
and
and
D2
1
1
1
1
st
st
st
st
....... D13 D14 D15 D16 D17 D18 ....... D29 D30 D31 D0
CDE & CDS
word
word
word
word
the TSD and RSD bits control transmit and receive shift
direction.
When EMS is set, the first data word received in a frame
will be transferred to bit 15-0 of the SSI_RxDR, the sec-
ond word will be transferred to bits 31-16 of the
SSI_RxDR. EMS = ‘0’ reverses the order of the halves of
SSI_RxDR. Likewise in the transmitter, when EMS is set,
the first data word transmitted in a frame will be bits 15-
0 of SSI_TxDR, the second word transferred will be bits
31-16 of SSI_TxDR.
TSD and RSD control the shift direction of transmit and
receive shift registers (TxSR and RxSR). Transmit data
is transmitted MSB first when TSD is ‘0’ or LSB first oth-
erwise. Receive data is received MSB first when RSD
equals ‘0’, LSB first otherwise.
For an example of the transmit operation see
Figure
shifted in
PRELIMINARY SPECIFICATION
15
D1
D0
17-9. Receive works the same, only that data is
or
.
D31 D30 D29 ....... D18 D17 D16 D15 D14 D13 ......
0
D1
D2
2
2
nd
2
2
nd
nd
nd
....... D13 D14 D15 D16 D17 D18 ......
word
word
word
word
SSI interrupt
Synchronous Serial Interface
D1
D0
D31 D30 D29 ......
3
3
3
3
D1
th
th
th
th
word
word
word
word
D2
......
17-7