PI7C8150ND Pericom Semiconductor, PI7C8150ND Datasheet - Page 65

• Manufacturer Part Number: PI7C8150ND
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ND

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Case: BGA
• Dc: 04+
• Lead Free Status / Rohs Status: Not Compliant

9
9.1
9.2
10
10.1
CLOCKS
This chapter provides information about the clocks.
PRIMARY CLOCK INPUTS
PI7C8150 implements a primary clock input for the PCI interface. The primary interface is
synchronized to the primary clock input, P_CLK, and the secondary interface is
synchronized to the secondary clock. The secondary clock is derived internally from the
primary clock, P_CLK. PI7C8150 operates at a maximum frequency of 66 MHz.
SECONDARY CLOCK OUTPUTS
PI7C8150 has 10 secondary clock outputs, S_CLKOUT[9:0] that can be used as clock
inputs for up to nine external secondary bus devices. The S_CLKOUT[9:0] outputs are
derived from P_CLK. The secondary clock edges are delayed from P_CLK edges by a
minimum of 0ns. This is the rule for using secondary clocks:
Each secondary clock output is limited to no more than one load.
GENERAL PURPOSE I/O INTERFACE
The PI7C8150 implements a 4-pin general purpose I/O interface. During normal operation,
device specific configuration registers control the GPIO interface. The GPIO interface can
be used for the following functions:
!
!
GPIO CONTROL REGISTERS
During normal operation, the following device specific configuration registers control the
GPIO interface:
!
!
!
These registers consist of five 8-bit fields:
During secondary interface reset, the GPIO interface can be used to shift in a 16-bit
serial stream that serves as a secondary bus clock disable mask.
Along with the GPIO[3] pin, a live insertion bit can be used to bring the PI7C8150 to a
halt through hardware, permitting live insertion of option cards behind the PI7C8150.
The GPIO output data register
The GPIO output enable control register
The GPIO input data register
55
March 19, 2003 – Revision 1.04
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
PI7C8150