PI7C8150ND Pericom Semiconductor, PI7C8150ND Datasheet - Page 76

• Manufacturer Part Number: PI7C8150ND
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ND

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Case: BGA
• Dc: 04+
• Lead Free Status / Rohs Status: Not Compliant

14.1.8
14.1.9
14.1.10
14.1.11
14.1.12
14.1.13
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch
HEADER TYPE REGISTER – OFFSET 0Ch
PRIMARY BUS NUMBER REGISTSER – OFFSET 18h
SECONDARY BUS NUMBER REGISTER – OFFSET 18h
SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h
Bit
7:0
Bit
15:8
Bit
23:16
Bit
7:0
Bit
15:8
Bit
23:16
Function
Cache Line Size
Function
Primary Latency
timer
Function
Header Type
Function
Primary Bus
Number
Function
Secondary Bus
Number
Function
Subordinate Bus
Number
Type
R/W
Type
R/W
Type
R/O
Type
R/W
Type
R/W
Type
R/W
Description
Designates the cache line size for the system and is used when
terminating memory write and invalidate transactions and when
prefetching memory read transactions.
Only cache line sizes (in units of 4-byte) which are a power of two
are valid (only one bit can be set in this register; only 00h, 01h, 02h,
04h, 08h, and 10h are valid values).
Reset to 0
Description
This register sets the value for the Master Latency Timer, which
starts counting when the master asserts FRAME_L.
Reset to 0
Description
Read as 01h to indicate that the register layout conforms to the
standard PCI-to-PCI bridge layout.
Description
Indicates the number of the PCI bus to which the primary interface
is connected. The value is set in software during configuration.
Reset to 0
Description
Indicates the number of the PCI bus to which the secondary
interface is connected. The value is set in software during
configuration.
Reset to 0
Description
Indicates the number of the PCI bus with the highest number that is
subordinate to the bridge. The value is set in software during
configuration.
Reset to 0
66
March 19, 2003 – Revision 1.04
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
PI7C8150