S19252PBIDB Applied Micro Circuits Corporation, S19252PBIDB Datasheet - Page 8

• Manufacturer Part Number: S19252PBIDB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S19252PBIDB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

S19252 Data Sheet
S19252 Overview
The S19252 transceiver incorporates SONET/SDH/10
GbE/10
deserialization functions. This chip can be used to
implement the front end of SONET/10 GbE/10 G Fibre
Channel equipment, which consists primarily of the
serial transmit interface and the serial receive
interface. The chip includes parallel-to-serial, and
serial-to-parallel conversion and system timing.
The sequence of operations is as follows:
Transmitter Operations:
Receiver Operations:
Figure 2:
8
1. 16-bit parallel input
2. Parallel-to-serial conversion
3. Serial data output
4. At rate transmitter clock output
1. Serial input to limiting post-amp
2. Inter Symbol Interference (ISI) compensation
3. Threshold adjustment
4. Clock and Data recovery
5. Phase adjustment for improved BER
6. Serial-to-parallel conversion
7. 16-bit parallel data and clock output
ASIC
G
Mid-Plane Application Block Diagram
16
16
Enable Adaptive Post-Amplifier Offset Control
Fibre
MDIO/I2C
S19252
/SPI
Compensates up to 24" of FR-4
Enable Adaptive ISI Mitigation
Channel
M
D
A
N
P
L
E
I
AppliedMicro - Confidential and Proprietary
S19252
MDIO/I2C
/SPI
serialization
16
16
ASIC
and
Figure 3:
Figure 4:
Suggested Interface Devices
Standards Compliance List
1.
2.
Standard Compliance only relates to applicable sections pertaining to this prod-
uct type.
AppliedMicro
AppliedMicro
AppliedMicro
AppliedMicro
300 Pin MSA for 
10G Transponders
GR-253-CORE SONET Jitter
Specifications
IEEE Draft P802.3ae/
XFP MSA (XFI Electrical- High
Speed outputs)
Fibre Channel Physical Interfaces
(FC-PI-2)
OIF SFI4 Phase 1
Parallel Interface
SFF-8431
See SFP+ Jitter Performance, Table 28 for transmitter
See LVDS Characteristics, Table 35 for Input Level
conditional compliance.
conditional compliance.
FRAMER
(Improves BER Performance and extends the reach of the standard XFP Module)
ASIC
FEC
OR
OR
FRAMER
ASIC
FEC
OR
OR
Standard
1
(SFP+ Host Serdes)
XFP Application Block Diagram
300 MSA Application Block Diagram
16
GANGES II
(S19202CBI20)
RUBICON (S19227)
MEKONG (S19204)
KHATANGA
(S19205)
16
16
16
2
Compensates up to 24" of FR-4
MDIO/I2C
S19252
C
O
N
N
E
C
O
R
T
/SPI
Enable Adaptive Post-Amplifier Offset Control
No Post Amplifier Required
S19252
Enable Adaptive ISI Mitigation
300 MSA MODULE
XFP MODULE
Edition 4
Issue 4.0
Rev 4.0
Rev 1.3
Rev 4.1
Rev 1.0
Revision
STS-192 POS/ATM SONET/SDH
Mapper
OC-192/48/12/3 DW/FEC/PM
and ASYNC Mapper Device with
Strong FEC
STS-192 Pointer Processor
STS-192c SONET/SDH Framer/
Mapper with Integrated MAC
-
Driver
Laser
TIA
August 14, 2002
December 2005
August 30, 2002
April 13, 2004
February 16, 2007
March 24, 2004
September 26, 2000
Laser
PD
Revision 5.03
Date