PCI-BOARD/S25 Altera, PCI-BOARD/S25 Datasheet - Page 27

• Manufacturer Part Number: PCI-BOARD/S25
• Manufacturer: Altera

Specifications of PCI-BOARD/S25

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Altera Corporation
1 (Standalone)
2 (HyperTransport DUT host/cave)
Table 26. JTAG Chain Bypass Jumper
Number of Boards in Chain
f
JTAG Chain Jumper
Table 25
Changing the JTAG Chain
J17 is the JTAG chain bypass jumper. The JTAG chain changes when two
Stratix PCI development boards are connected via the HSDI port B
connector. Insert two shunts according to the configuration as shown in
Table
SignalTap II Logic Analyzer
The JTAG debug interface can also be used for Altera’s SignalTap II logic
analyzer.
Refer to AN 280: Design Verification Using the SignalTap II Embedded Logic
Analyzer for a description of the SignalTap II logic analyzer.
Agilent/Samtec ASP Differential Probe
J12 is an Agilent/Samtec ASP differential probe header that monitors
port B link 0’s receive signals. Compatible adaptors include the Agilent
Technologies E5379A differential probe adaptor.
Table 25. JTAG Chain Jumper
26.
shows the JTAG chain jumper.
–
Host
Cave
J17 pins 1 and 3
J17 pins 4 and 6
Shunt Connects
Board Position
J17.1 to J17.3
J17.1 to J17.3
J17.3 to J17.5
Shunt 1 Connects
Stratix PCI Development Board Data Sheet
Factory-default setting.
Description
J17.4 to J17.6
J17.2 to J17.4
J17.2 to J17.4
Shunt 2 Connects
27