PCI-BOARD/S25 Altera, PCI-BOARD/S25 Datasheet - Page 75

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PCI-BOARD/S25

Manufacturer Part Number
PCI-BOARD/S25
Description
Manufacturer
Altera
Datasheet

Specifications of PCI-BOARD/S25

Lead Free Status / Rohs Status
Supplier Unconfirmed
E
D
C
B
A
Copyright (c) 2003, Altera Corporation. All Rights Reserved.
JTAG_MAX_TDO
R10
8
8
EP1S_CONF_DONEn 5
OVERTEMPn
ALERTn
EP1S_INIT_DONE
CLK_TO_MAX_A 15
CLK_OSC_A 14,15
SYS_RESETn 5,8,14
JTAG_MAX_TDI 15
0
CRC_ERRORn 5
B1_RESETn 8,10
B1_PWROK 8,10
B6_RESETn 9,11
B6_PWROK 9,11
USER_RESETn 5,8
TP1
JTAG_TMS
JTAG_TCK
EP1S_nCONFIG
EP1S_nSTATUS
EP1S_CONF_DONE
USE_MPGM
MPGM0
MPGM1
USER_LED_DRV0
USER_LED0
USER_LED_DRV1
USER_LED1
USER_LED_DRV2
USER_LED2
USER_LED_DRV3
USER_LED3
USER_LED_DRV4
USER_LED4
USER_LED_DRV5
USER_LED5
USER_LED_DRV6
USER_LED6
USER_LED_DRV7
USER_LED7
CRC_ERROR
DCLK
JTAG_MAX_TDOA
EPM3256ATC144
125
128
127
126
104
143
142
141
140
139
138
137
136
134
133
132
131
20
89
10
36
35
34
32
31
30
29
28
44
43
42
41
40
39
38
37
19
18
16
15
14
12
11
21
22
23
25
27
4
2
1
9
8
7
6
5
U1
GCLK1
GCLK2
GCLRn
OE1
TDI
TMS
TCK
TDO
A3
A5
A6
A11
A13
A14
A16
B19
B21
B24
B25
B27
B29
C33
C35
C37
C40
C41
C43
C45
C48
D49
D51
D53
D54
D56
D59
D61
D64
E69
E72
E73
E75
E77
E78
E80
F83
F85
F88
F89
F91
F93
F96
G109
G107
G105
G104
G99
3.3V
7
7
M193
M195
M197
M200
M201
M203
M206
M208
P241
P243
P245
P246
P249
P253
P256
O227
O229
O233
O235
O237
O240
N211
N213
N216
N217
N219
N221
K163
K165
K168
K169
K171
K173
H115
H117
H120
H121
H123
H125
H128
L179
L181
L184
L185
L187
L189
L192
J147
J149
J152
J153
J157
J160
I131
I133
I136
I137
I139
I141
I144
6
6
66
67
68
69
70
71
72
74
75
78
79
80
81
98
99
100
101
102
103
106
107
108
109
110
111
112
113
55
56
60
61
62
63
65
82
83
84
86
87
88
90
91
92
93
96
97
116
117
118
119
120
121
122
54
53
49
48
47
46
45
5
CPLD, Flash Memory, Dipswitches
CPLD_CSn
CPLD_USER0
CPLD_USER1
USER_PB2
USER_PB1
FLASH_A21
FLASH_A20
FLASH_A19
FLASH_A18
FLASH_A17
FLASH_A16
FLASH_A15
FLASH_A14
FLASH_A13
FLASH_A12
FLASH_A11
FLASH_A10
FLASH_A9
FLASH_A8
FLASH_A7
FLASH_A6
FLASH_A5
FLASH_A4
FLASH_A3
FLASH_A2
FLASH_A1
FLASH_A0
FLASH_CEn
FLASH_OEn
FLASH_WEn
FLASH_RDY_BSYn
FLASH_BYTEn
FLASH_D15
FLASH_D14
FLASH_D13
FLASH_D12
FLASH_D11
FLASH_D10
FLASH_D9
FLASH_D8
FLASH_D7
FLASH_D6
FLASH_D5
FLASH_D4
FLASH_D3
FLASH_D2
FLASH_D1
FLASH_D0
FLASH_RESETn
SPGM0
SPGM1
SPGM2
PCI_M66EN
RUnLU
SMSEL2
USE_MPGM
MPGM1
MPGM0
PCIX_66SEL133
5
5
PCI_XCAP
PCI_M66EN
RUnLU
SMSEL2
USE_MPGM
MPGM1
MPGM0
DEV_CLRn
1
2
3
4
5
6
7
8
RN4
DEV_CLRn
EP1S_nSTATUS
EP1S_nCONFIG
EP1S_CONF_DONE
FLASH_WEn
FLASH_OEn
FLASH_BYTEn
FLASH_A21
FLASH_CEn
PORSEL
nIO_PULLUP
16
FLASH_A0
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A13
FLASH_A14
FLASH_A15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_CEn
FLASH_OEn
FLASH_WEn
FLASH_RESETn
FLASH_BYTEn
MAIN_SW
10K
16
15
14
13
12
11
10
9
S1
SW_DIP
3.3V
25
24
23
22
21
20
19
18
48
17
16
10
13
26
28
11
12
47
8
7
6
5
4
3
2
1
9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
CE
OE
WE
RESET
BYTE
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN1
RN2
U3
AM29DL640D
4
4
D15_A_1
WP/ACC
RY/BY
VSS1
VSS2
VCC
D10
D11
D12
D13
D14
10K
10K
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
37
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
15
14
27
46
3.3V
3.3V
FLASH_D0
FLASH_D1
FLASH_D2
FLASH_D3
FLASH_D4
FLASH_D5
FLASH_D6
FLASH_D7
FLASH_D8
FLASH_D9
FLASH_D10
FLASH_D11
FLASH_D12
FLASH_D13
FLASH_D14
FLASH_D15
FLASH_RDY_BSYn
FLASH_WPn
3
3
5,16
5,16
EP1S_CONF_DONE
EP1S_nCONFIG
EP1S_nSTATUS
EP1S_INIT_DONE
DCLK
PORSEL
nIO_PULLUP
5,8
OVERTEMPn
ALERTn
5
USER_PB[2..1]
CPLD_USER[1..0]
3.3V
ByteBlaster / MasterBlaster Header
FLASH_D0
FLASH_D1
FLASH_D2
FLASH_D3
FLASH_D4
FLASH_D5
FLASH_D6
FLASH_D7
3.3V
(uses JTAG mode only)
1
2
3
4
5
6
7
8
RN3
10
2
4
6
8
AE15
AG19
AC19
AB18
AA19
AG15
Title
Size
Date:
AF15
AJ14
AF18
G18
G16
G19
H21
E19
E14
F14
F15
C16
K19
D14
J18
J19
J20
J1
HEADER
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Stratix PCI Development Board
B
JTAG_STRATIX_TDO_RS
U2I
CLKUSR
CONF_DONE
nCONFIG
nSTATUS
INIT_DONE
DCLK
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
CS
nCS
nWS
nRS
RDYnBSY
PORSEL
nIO_PULLUP
VCCSEL
nCE
1K
Document Number
16
15
14
13
12
11
10
9
1
3
5
7
9
Wednesday, February 12, 2003
2
2
DEV_CLRn/IO7
CRC_ERROR
EP1S40F1020
DEV_OE
MSEL0
MSEL1
MSEL2
RUnLU
R9
PGM2
PGM1
PGM0
nCEO
TRST
TDO
TMS
TCK
NC1
NC2
TDI
150-0216000-01
10
G15
G14
D16
F16
E15
AA20
AG14
AD18
AG18
AE18
AE19
AF14
AF20
AH14
L13
V12
AG27
AH15
5
10,15
10
15
10
15
5
5
5
2
2
USER_LED_DRV[7..0]
USER_LED[7..0]
FLASH_D[15..0]
FLASH_A[21..0]
PCI_XCAP
PCI_M66EN
5
5
5
0
JTAG_TCK
JTAG_CONN_TDI
JTAG_TMS
JTAG_CONN_TDO
JTAG_TRSTn
JTAG_TCK
JTAG_MAX_TDO
JTAG_STRATIX_TDO_RS
JTAG_TMS
FLASH_WPn
JTAG_STRATIX_TDO
JTAG_TRSTn
JTAG Chain Devices:
(1) Max 3K
(2) Stratix
(3) B1 Samtec Connector
SPGM2
SPGM1
SPGM0
SMSEL0
SMSEL1
SMSEL2
RUnLU
CRC_ERROR
FLASH_OEn
FLASH_CEn
FLASH_WEn
Sheet
DEV_CLRn
R11
R12
17
1
1
0
0
o f
18
R e v
B
E
D
C
B
A