SI3018-F-FSR Silicon Laboratories Inc, SI3018-F-FSR Datasheet - Page 85
![Modem Chip Chipset 16-Pin SOIC T/R](/photos/31/27/312732/16pin_soic_n_sml.jpg)
SI3018-F-FSR
Manufacturer Part Number
SI3018-F-FSR
Description
Modem Chip Chipset 16-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3018-F-FSR.pdf
(112 pages)
Specifications of SI3018-F-FSR
Package
16SOIC
Main Category
Chipset
Sub-category
Data/Voice
Typical Operating Supply Voltage
3.3 V
Power Supply Type
Digital
Typical Supply Current
8.5 mA
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Data Rate
54.6875Kbps
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
16
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI3018-F-FSR
Manufacturer:
SiliconL
Quantity:
52 026
Company:
Part Number:
SI3018-F-FSR
Manufacturer:
SILICON
Quantity:
57
Part Number:
SI3018-F-FSR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Register 34. PCM Transmit Start Count—Low Byte
Reset settings = 0000_0000
Register 35. PCM Transmit Start Count—High Byte
Reset settings = 0000_0000
Register 36. PCM Receive Start Count—Low Byte
Reset settings = 0000_0000
Bit
7:0
Bit
7:2
1:0
Bit
7:0
Name
Name
Name
Type
Type
Type
Bit
Bit
Bit
Reserved
RXS[7:0]
TXS[7:0]
TXS[1:0]
Name
Name
Name
D7
D7
D7
PCM Transmit Start Count.
PCM Transmit Start Count equals the number of PCLKs following FSYNC before data
transmission begins.
PCM Transmit Start Count.
PCM Transmit Start Count equals the number of PCLKs following FSYNC before data
transmission begins.
PCM Receive Start Count.
PCM Receive Start Count equals the number of PCLKs following FSYNC before data
reception begins.
Read returns zero.
D6
D6
D6
D5
D5
D5
Rev. 1.31
D4
D4
D4
RXS[7:0]
TXS[7:0]
R/W
R/W
Function
Function
Function
D3
D3
D3
Si3050 + Si3018/19
D2
D2
D2
D1
D1
D1
TXS[1:0]
R/W
D0
D0
D0
85