SI3018-F-FSR Silicon Laboratories Inc, SI3018-F-FSR Datasheet - Page 9

• Manufacturer Part Number: SI3018-F-FSR
• Description: Modem Chip Chipset 16-Pin SOIC T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3018-F-FSR

• Package: 16SOIC
• Main Category: Chipset
• Sub-category: Data/Voice
• Typical Operating Supply Voltage: 3.3 V
• Power Supply Type: Digital
• Typical Supply Current: 8.5 mA
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V
• Data Rate: 54.6875Kbps
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 16
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

Table 4. AC Characteristics (Continued)
(V
Table 5. Absolute Maximum Ratings
Dynamic Range (Caller ID mode)
Caller ID Full-Scale Level
Gain Accuracy
Transhybrid Balance
Transhybrid Balance
Two-Wire Return Loss
Two-Wire Return Loss
Notes:
Parameter
DC Supply Voltage
Input Current, Si3050 Digital Input Pins
Digital Input Voltage
Ambient Operating Temperature Range
Storage Temperature Range
Note: Permanent device damage can occur if the above Absolute Maximum Ratings are exceeded. Functional operation
Parameter
D
=
1. Measured at TIP and RING with 600 termination at 1 kHz, as shown in Figure 1 on page 6.
2. With FULL = 1, the transmit and receive full-scale level of +3.2 dBm can be achieved with a 600  ac termination. While
3. Receive full-scale level produces –0.9 dBFS at DTX.
4. DR = 20 x log (RMS V
5. Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths.
6. Vin = 1 kHz, –3 dBFS.
7. THD = 20 x log (RMS distortion/RMS signal).
8. DR
9. Refer to Tables 10–11 for relative gain accuracy characteristics (passband ripple).
10. Analog hybrid only. Z
3.0 to 3.6 V, T
the transmit and receive level in dBm varies with reference impedance, the DAA will transmit and receive 1 dBV into all
reference impedances. With FULL2 = 1, the transmit and receive full-scale level of +6.0 dBm can be achieved with a
600  termination. In this mode, the DAA will transmit and receive +1.5 dBV into all reference impedances.
Here, V
enhanced caller ID circuit. With the typical CID circuit, the V
50 dB.
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods might affect device reliability.
CID
= 20 x log (RMS V
FS
6,9
is the 0 dBm full-scale level per Note 1 above.
A
=
10
10
0 to 70 °C for F/K-Grade,
8
ACIM
FS
/RMS Vin) + 20 x log (RMS V
CID
controlled by ACIM in Register 30.
/RMS V
8
Symbol
DR
V
IN
CID
) + 20 x log (RMS V
CID
Fs = 8000 Hz,
300–3.4 kHz,
1 kHz, all ac terminations
Symbol
VIN = 1 kHz, –13 dBFS
T
TXG2, RXG2, TXG3,
V
Rev. 1.31
1 kHz,
300–3.4 kHz, all ac
V
I
T
STG
and RXG3 = 0000
IND
in
IN
D
A
Test Condition
/RMS noise). The RMS noise measurement excludes harmonics.
2-W to DTX,
terminations
IN
see
CID
Z
/RMS noise). V
ACIM
"2. Typical Application Schematic" on page 17
full-scale level is 6 V peak, and the DR
Z
ACIM
=
Z
LINE
=
–0.3 to (V
Si3050 + Si3018/19
Z
LINE
–0.5 to 3.6
–40 to 100
–65 to 150
CID
Value
±10
is the 1.5 V full-scale level with the
D
+ 0.3)
–0.5
Min
—
—
20
—
25
—
Typ
1.5
62
30
32
—
—
0
Max
CID
0.5
—
—
—
—
—
—
Unit
mA
°C
°C
decreases to
V
V
V
Unit
PEAK
dB
dB
dB
dB
dB
dB
)
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