EP4CGX15BF14C8N Altera, EP4CGX15BF14C8N Datasheet - Page 406

• Manufacturer Part Number: EP4CGX15BF14C8N
• Description: IC CYCLONE IV FPGA 15K 169FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX15BF14C8N

• Number Of Logic Elements/cells: 14400
• Number Of Labs/clbs: 900
• Total Ram Bits: 540000
• Number Of I /o: 72
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 169-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1475

3–16
Figure 3–7. Read Transaction Waveform—Use the same control signal for all the channels Option Enabled
Note to
(1) In this waveform example, you want to read from only the transmitter portion of all the channels.
Cyclone IV Device Handbook, Volume 2
Figure
rx_tx_duplex_sel [1:0]
tx_vodctrl_out [2:0]
3–7:
1
reconfig_clk
data_valid
To complete a read transaction to the V
following steps:
1. Before you initiate a read transaction, set the rx_tx_duplex_sel port to 2'b10 so
2. Ensure that the busy signal is low before you start a read transaction.
3. Assert the read signal for one reconfig_clk clock cycle. This initiates the read
4. The busy output status signal is asserted high to indicate that the dynamic
5. When the read transaction has completed, the busy signal goes low. The
6. To read the current V
In the waveform example shown in
channels 1 and 2 prior to the read transaction are 3'b001 and 3'b010, respectively.
Simultaneous write and read transactions are not allowed.
busy
read
that only the transmit PMA controls are read from the transceiver channel.
transaction.
reconfiguration controller is busy reading the PMA control settings.
data_valid signal is asserted, indicating that the data available at the read control
signal is valid.
tx_vodctrl_out[5:3].
(1)
2'b00
OD
values in channel 2, observe the values in
6'b111111
Figure
OD
values of the second channel, perform the
3–7, the transmit V
2'b10
Chapter 3: Cyclone IV Dynamic Reconfiguration
6'bXXXXXX
© December 2010 Altera Corporation
OD
Dynamic Reconfiguration Modes
settings written in
6'b010001