ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 64

IC ENERGY METER 1PHASE 64LQFP

ADE7166ASTZF8

Manufacturer Part Number
ADE7166ASTZF8
Description
IC ENERGY METER 1PHASE 64LQFP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADE7166ASTZF8

Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (8 kB)
Controller Series
ADE71xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Ic Function
Single Phase Energy Measurement IC
Supply Voltage Range
3.13V To 3.46V, 2.4V To 3.7V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7166ASTZF8
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADE7166ASTZF8-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7566/ADE7569/ADE7166/ADE7169
Reactive Power Gain Calibration
Figure 71 shows the signal processing chain for the
ADE7569/ADE7169 reactive power calculation. As explained in
the Reactive Power Calculation for the ADE7569/ADE7169
section, the reactive power is calculated by applying a low-pass
filter to the instantaneous reactive power signal. Note that,
when reading the waveform samples from the output of LPF2,
the gain of the reactive energy can be adjusted by using the
multiplier and by writing a twos complement, 12-bit word to
the VAR gain register (VARGAIN[11:0]). Equation 25 shows
how the gain adjustment is related to the contents of the watt
gain register.
The resolution of the VARGAIN register is the same as the
WGAIN register (see the Active Power Gain Calibration
section). VARGAIN can be used to calibrate the reactive
power (or energy) calculation in the ADE7569/ADE7169.
Reactive Power Offset Calibration
The ADE7569/ADE7169 also incorporate a reactive power
offset register (VAROS[15:0]). This is a signed, twos complement,
16-bit register that can be used to remove offsets in the reactive
power calculation (see Figure 71). An offset can exist in the
reactive power calculation due to crosstalk between channels on
the PCB or in the IC itself. The offset calibration allows the
contents of the reactive power register to be maintained at 0
when no power is being consumed.
The 256 LSBs (VAROS = 0x100) written to the reactive power
offset register are equivalent to 1 LSB in the WAVMODE register.
Sign of Reactive Power Calculation
Note that the average reactive power is a signed calculation.
The phase shift filter has −90° phase shift when the integrator
is enabled, and +90° phase shift when the integrator is disabled.
Table 45 summarizes the relationship of the phase difference
between the voltage and the current and the sign of the resulting
VAR calculation.
Table 45. Sign of Reactive Power Calculation
Angle
Between 0° to +90°
Between –90° to 0°
Between 0° to +90°
Between –90° to 0°
Reactive Power Sign Detection
The ADE7569/ADE7169 detect a change of sign in the reactive
power. The VARSIGN flag in the Interrupt Status 1 SFR
(MIRQSTL, 0xDC) records when a change of sign has occurred
according to the VARSIGN bit in the ACCMODE register
(0x0F). If the VARSIGN bit is set in the Interrupt Enable 1 SFR
Output VARGAIN =
Reactive
Power
×
⎧ +
1
VARGAIN
Integrator
Off
Off
On
On
2
12
Sign
Positive
Negative
Positive
Negative
Rev. A | Page 64 of 144
(25)
(MIRQENL, 0xD9), the 8052 core has a pending ADE interrupt.
The ADE interrupt stays active until the VARSIGN status bit is
cleared (see the Energy Measurement Interrupts section).
When VARSIGN in the ACCMODE register (0x0F) is cleared
(default), the VARSIGN flag in the Interrupt Status 1 SFR
(MIRQSTL, 0xDC) is set when a transition from positive to
negative reactive power occurrs.
When VARSIGN in the ACCMODE register (0x0F) is set, the
VARSIGN flag in the Interrupt Status 1 SFR (MIRQSTL, 0xDC)
is set when a transition from negative to positive reactive power
occurrs.
Reactive Power No-Load Detection
The ADE7569/ADE7169 include a no-load threshold feature on
the reactive energy that eliminates any creep effects in the
meter. The ADE7569/ADE7169 accomplish this by not
accumulating reactive energy when the multiplier output is
below the no-load threshold. When the reactive power is below
the no-load threshold, the RNOLOAD flag in the Interrupt Status
1 SFR (MIRQSTL, 0xDC) is set. If the RNOLOAD bit is set in the
Interrupt Enable 1 SFR (MIRQENL, 0xD9), the 8052 core has a
pending ADE interrupt. The ADE interrupt stays active until the
RNOLOAD status bit is cleared (see the Energy Measurement
Interrupts section).
The no-load threshold level is selectable by setting the
VARNOLOAD bits in the NLMODE register (0x0E).
Setting these bits to 0b00 disables the no-load detection,
and setting them to 0b01, 0b10, or 0b11 sets the no-load
detection threshold to 0.015%, 0.0075%, and 0.0037% of
the full-scale output frequency of the multiplier, respectively.
REACTIVE ENERGY CALCULATION FOR THE
ADE7569/ADE7169
As for active energy, the ADE7569/ADE7169 achieve the
integration of the reactive power signal by continuously
accumulating the reactive power signal in an internal, nonreadable,
49-bit energy register. The reactive energy register (VARHR[23:0])
represents the upper 24 bits of this internal register. The
VARHR register and its function are available for the
ADE7569/ADE7169 but not for the ADE7566/ADE7166.
The discrete time sample period (T) for the accumulation register
in the ADE7569/ADE7169 is 1.22 μs (5/MCLK). As well as
calculating the energy, this integration removes any sinusoidal
components that may be in the active power signal. Figure 71
shows this discrete time integration or accumulation. The
reactive power signal in the waveform register is continuously
added to the internal reactive energy register.
The reactive energy accumulation depends on the setting of the
SAVARM and ABSVARM bits in the ACCMODE register (0x0F).
When both bits are cleared, the addition is signed and, therefore,
negative energy is subtracted from the reactive energy contents.
When both bits are set, the ADE7569/ADE7169 are set to be in
the more restrictive mode, the absolute accumulation mode.

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