ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 88

• Manufacturer Part Number: ADE7166ASTZF8
• Description: IC ENERGY METER 1PHASE 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7166ASTZF8

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (8 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7566/ADE7569/ADE7166/ADE7169
DUAL DATA POINTERS
Each ADE7566/ADE7569/ADE7166/ADE7169 incorporates
two data pointers. The second data pointer is a shadow data
pointer and is selected via the Data Pointer Control SFR (DPCON,
0xA7). DPCON features automatic hardware postincrement and
postdecrement, as well as an automatic data pointer toggle.
Note that this section of the data sheet is the only place where
the main and shadow data pointers are distinguished. Whenever
the data pointer (DPTR) is mentioned elsewhere in the data
sheet, active DPTR is implied.
In addition, only the MOVC/MOVX @DPTR instructions
automatically postincrement and postdecrement the DPTR.
Other MOVC/MOVX instructions, such as MOVC PC
or MOVC @Ri, do not cause the DPTR to automatically
postincrement and postdecrement.
To illustrate the operation of DPCON, the following code copies
256 bytes of code memory at Address 0xD000 into XRAM,
starting from Address 0x0000:
Table 66. Data Pointer Control SFR (DPCON, 0xA7)
Bit
7
6
5, 4
3, 2
1
0
Mnemonic
DPT
DP1m1,
DP1m0
DP0m1,
DP0m0
DPSEL
Default
0
0
0
0
0
0
Description
Not Implemented. Write Don’t Care.
Data Pointer Automatic Toggle Enable. Cleared by the user to disable autoswapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow Data Pointer Mode. These bits enable extra modes of the shadow data pointer operation,
allowing more compact and more efficient code size and execution.
DP1m1
0
0
1
1
Main Data Pointer Mode. These bits enable extra modes of the main data pointer operation, allowing
more compact and more efficient code size and execution.
DP0m1
0
0
1
1
Not Implemented. Write Don’t Care.
Data Pointer Select. Cleared by the user to select the main data pointer, meaning that the contents of
this 16-bit register are placed into the DPL SFR and DPH SFR. Set by the user to select the shadow data
pointer, meaning that the contents of a separate 16-bit register appear in the DPL SRF and DPH SFR.
DP1m0
0
1
0
1
DP0m0
0
1
0
1
Result (Behavior of the Shadow Data Pointer)
8052 behavior.
DPTR is postincremented after a MOVX or a MOVC instruction.
DPTR is postdecremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction can be
useful for moving 8-bit blocks to/from 16-bit devices.
Result (Behavior of the Main Data Pointer)
8052 behavior.
DPTR is postincremented after a MOVX or a MOVC instruction.
DPTR is postdecremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction is useful
for moving 8-bit blocks to/from 16-bit devices.
Rev. A | Page 88 of 144
MOVELOOP: CLR A
MOV DPTR,#0
MOV DPCON,#55H
MOV DPTR,#0D000H
MOVC A,@A+DPTR
MOV A, DPL
JNZ MOVELOOP
;DPTR1 increment mode
;DPTR0 increment mode
;DPTR auto toggling ON
;Post Inc DPTR
;Swap to Main DPTR(Data)
;Increment main DPTR
;Swap Shadow DPTR(Code)
MOVX @DPTR,A
;Main DPTR = 0
;Select shadow DPTR
;DPTR = D000H
;Get data
;Put ACC in XRAM