ADE7166ASTZF8 Analog Devices Inc, ADE7166ASTZF8 Datasheet - Page 78

• Manufacturer Part Number: ADE7166ASTZF8
• Description: IC ENERGY METER 1PHASE 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7166ASTZF8

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (8 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7566/ADE7569/ADE7166/ADE7169
8052 MCU CORE ARCHITECTURE
The ADE7566/ADE7569/ADE7166/ADE7169 have an 8052
MCU core and use the 8052 instruction set. Some of the
standard 8052 peripherals, such as the UART, have been
enhanced. This section describes the standard 8052 core and its
enhancements used in the ADE7566/ADE7569/ADE7166/
ADE7169.
The special function register (SFR) space is mapped into the
upper 128 bytes of internal data memory space and is accessed
by direct addressing only. It provides an interface between the
CPU and all on-chip peripherals. A block diagram showing the
programming model of the ADE7566/ADE7569/ADE7166/
ADE7169 via the SFR area is shown in Figure 80.
All registers except the program counter (PC), instruction
register (IR), and the four general-purpose register banks
reside in the SFR area. The SFR registers include power
control, configuration, and data registers that provide an
interface between the CPU and all on-chip peripherals.
MCU REGISTERS
The registers used by the MCU are summarized in this section.
Table 55. 8052 SFRs
Address
0xE0
0xF0
0xD0
0x87
0x82
0x83
0x83 and 0x82
0x81
0xAF
Table 56. Program Status Word SFR (PSW, 0xD0)
Bit
7
6
5
4 to 3
2
1
0
Address
0xD7
0xD6
0xD5
0xD4, 0xD3
0xD2
0xD1
0xD0
Mnemonic
CY
AC
F0
RS1, RS0
OV
F1
P
Mnemonic
ACC
B
PSW
PCON
DPL
DPH
DPTR
SP
CFG
Description
Carry Flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
Auxiliary Carry Flag. Modified by ADD and ADDC instructions.
General-Purpose Flag Available to the User.
Register Bank Select Bits.
RS1
0
0
1
1
Overflow Flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
General-Purpose Flag Available to the User.
Parity Bit. The number of bits set in the accumulator added to the value of the parity bit is always an
even number.
RS0
0
1
0
1
Bit Addressable
Yes
Yes
Yes
No
No
No
No
No
No
Result (Selected Bank)
0
1
2
3
Rev. A | Page 78 of 144
Program Control Register (see Table 57).
Data Pointer Low (see Table 58).
Stack Pointer (see Table 61).
Description
Accumulator.
Auxiliary Math Register.
Program Status Word (see Table 56).
Data Pointer High (see Table 59).
Data Pointer (see Table 60).
Configuration (see Table 62).
256 BYTES
REGISTER
GENERAL
PURPOSE
BANKS
Figure 80. ADE7566/ADE7569/ADE7166/ADE7169 Block Diagram
STACK
RAM
16kB ELECTRICALLY
REPROGRAMMABLE
PROGRAM/DATA
256 BYTES XRAM
NONVOLATILE
COMPATIBLE
PC
FLASH/EE
MEMORY
CORE
8051
IR
FUNCTION
REGISTER
128-BYTE
SPECIAL
AREA
OTHER ON-CHIP
PERIPHERALS:
• SERIAL I/O
• WDT
• TIMERS
MEASUREMENT
TEMPERATURE
MANAGEMENT
LCD DRIVER
BATTERY
ENERGY
POWER
RTC
ADC
ADC