CY7C66113-PVC Cypress Semiconductor Corp, CY7C66113-PVC Datasheet - Page 23

IC MCU 8K USB HUB 4 PORT 56TSSOP

CY7C66113-PVC

Manufacturer Part Number
CY7C66113-PVC
Description
IC MCU 8K USB HUB 4 PORT 56TSSOP
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C66113-PVC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB, HAPI
Number Of I /o
31
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1330

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C66113-PVC
Manufacturer:
CY
Quantity:
10
are set to ‘0’ when the device is suspended, that DAC input will float. The floating pin could result in excessive current consumption
by the device, unless an external load places the pin in a deterministic state.
DAC Port Data
Bit [1..0]: High Current Output 3.2 mA to 16 mA typical
resistor.
Bit [7..2]: Low Current Output 0.2 mA to 1 mA typical
resistor.
10.1
Each DAC I/O pin has an associated DAC Isink register to program the output sink current when the output is driven LOW. The
first Isink register (0x38) controls the current for DAC[0], the second (0x39) for DAC[1], and so on until the Isink register at 0x3F,
controls the current to DAC[7].
DAC Sink Register
Bit [4..0]: Isink [x] (x= 0..4)
Bit [7..5]: Reserved
10.2
A DAC port interrupt can be enabled/disabled for each pin individually. The DAC Port Interrupt Enable register provides this
feature with an interrupt enable bit for each DAC I/O pin. All of the DAC Port Interrupt Enable register bits are cleared to ‘0’ during
a reset. All DAC pins share a common interrupt, as explained in Section 16.7.
DAC Port Interrupt
Bit [7..0]: Enable bit x (x= 0..7)
As an additional benefit, the interrupt polarity for each DAC pin is programmable with the DAC Port Interrupt Polarity register.
Writing a ‘0’ to a bit selects negative polarity (falling edge) that causes an interrupt (if enabled) if a falling edge transition occurs
on the corresponding input pin. Writing a ‘1’ to a bit in this register selects positive polarity (rising edge) that causes an interrupt
(if enabled) if a rising edge transition occurs on the corresponding input pin. All of the DAC Port Interrupt Polarity register bits are
cleared during a reset.
DAC Port Interrupt
Document #: 38-08024 Rev. *A
Bit #
Bit Name
Read/Write
Reset
Bit #
Bit Name
Read/Write
Reset
Bit #
Bit Name
Read/Write
Reset
Bit #
Bit Name
Read/Write
1= I/O pin is an output pulled HGH through the 14-k
1= I/O pin is an output pulled HGH through the 14-k
DAC Isink Registers
Writing all ‘0’s to the Isink register causes 1/5 of the max current to flow through the DAC I/O pin. Writing all ‘1’s to the
Isink register provides the maximum current flow through the pin. The other 14 states of the DAC sink current are evenly
spaced between these two values.
DAC Port Interrupts
1= Enables interrupts from the corresponding bit position; 0= Disables interrupts from the corresponding bit position
7
DAC[7]
R/W
1
7
Reserved
-
7
Enable Bit 7
W
0
7
Enable Bit 7
W
6
DAC[6]
R/W
1
6
Reserved
-
6
Enable Bit 6
W
0
6
Enable Bit 6
W
Figure 10-5. DAC Port Interrupt Polarity
Figure 10-4. DAC Port Interrupt Enable
5
DAC[5]
R/W
1
5
Reserved
-
5
Enable Bit 5
W
0
5
Enable Bit 5
W
Figure 10-3. DAC Sink Register
Figure 10-2. DAC Port Data
4
DAC[4]
R/W
1
4
Reserved
-
4
Enable Bit 4
W
0
4
Enable Bit 4
W
resistor. 0 = I/O pin is an input with an internal 14-k
resistor. 0 = I/O pin is an input with an internal 14-k
3
DAC[3]
R/W
1
3
Isink[3]
W
0
3
Enable Bit 3
W
0
3
Enable Bit 3
W
2
DAC[2]
R/W
1
2
Isink[2]
W
0
2
Enable Bit 2
W
0
2
Enable Bit 2
W
1
DAC[1]
R/W
1
1
Isink[1]
W
0
1
Enable Bit 1
W
0
1
Enable Bit 1
W
CY7C66013
CY7C66113
ADDRESS 0x38 –0x3F
Page 23 of 58
ADDRESS 0x30
0
DAC[0]
R/W
1
0
Isink[0]
W
0
ADDRESS 0x31
0
Enable Bit 0
W
0
ADDRESS 0x32
0
Enable Bit 0
W
pull-up
pull-up

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